[llvm] [DirectX] only allow intrinsics defined in DXIL.td (PR #128613)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-directx

Author: Farzon Lotfi (farzonl)

<details>
<summary>Changes</summary>

Fixes #<!-- -->128071
The current behavior lets intrinsics that don't map to a DXILOP slip through. Nothing catches this until we hit the DXIL validator. This change fails earlier so we don't encode invalid llvm intrinsics that can slip through because of clang builtins like `__builtin_reduce_and`
example:
https://hlsl.godbolt.org/z/13rPj18vn

---
Full diff: https://github.com/llvm/llvm-project/pull/128613.diff


2 Files Affected:

- (modified) llvm/lib/Target/DirectX/DXILOpLowering.cpp (+5-2) 
- (added) llvm/test/CodeGen/DirectX/unknown_intrinsic.ll (+11) 


``````````diff
diff --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index 83cc4b18824c7..a98107a71c219 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -770,8 +770,11 @@ class OpLowerer {
         continue;
       Intrinsic::ID ID = F.getIntrinsicID();
       switch (ID) {
-      default:
-        continue;
+      default: {
+        DiagnosticInfoUnsupported Diag(F, "Unknown intrinsic?");
+        M.getContext().diagnose(Diag);
+        break;
+      }
 #define DXIL_OP_INTRINSIC(OpCode, Intrin, ...)                                 \
   case Intrin:                                                                 \
     HasErrors |= replaceFunctionWithOp(                                        \
diff --git a/llvm/test/CodeGen/DirectX/unknown_intrinsic.ll b/llvm/test/CodeGen/DirectX/unknown_intrinsic.ll
new file mode 100644
index 0000000000000..efd0c5637077e
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/unknown_intrinsic.ll
@@ -0,0 +1,11 @@
+; RUN: not opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s 2>&1 | FileCheck %s
+
+; CHECK: error: <unknown>:0:0: in function llvm.vector.reduce.and.v4i32 i32 (<4 x i32>): Unknown intrinsic?
+define i32 @fn_and(<4 x i32> %0) local_unnamed_addr #0 {
+  %2 = tail call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %0)
+  ret i32 %2
+}
+
+declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32>)
+
+attributes #0 = { convergent norecurse nounwind "hlsl.export"}

``````````

</details>


https://github.com/llvm/llvm-project/pull/128613