[llvm] [RISCV] Merge Xqci Decoder Tables (PR #128140)

[Sam Elliott via llvm-commits]

lenary wrote:

> I think for the GPRNoX0 case, if the field is constant a 0 in another instruction decoder should handle that correctly without hasCompleteDecoder.

Yeah, I looked closer at the decoder emitter in tablegen, and it copes fine with this and with the Zcmt `cm.jt`/`cm.jalt` distinction, in both cases because the bits decoded or not are still on a boundary that is clear enough to it.

I think these cases should apply to `uimm5gt3` as well - the instructions in the hole created by `gt3` should be more defined (on a bit by bit basis) than those in `qc.shladd`. If we end up with operands where this isn't the case, we can fix it then.

I am still not entirely enamoured by using `decodeUImmOperand<N>` for both `uimm5gt3` and `uimm8ge32` - so I will do a patch for that.

https://github.com/llvm/llvm-project/pull/128140