[llvm] [LV] Optimize VPWidenIntOrFpInductionRecipe for known TC (PR #118828)

[Hari Limaye via llvm-commits]

hazzlim wrote:

> > > One more thing I am wondering if we could end up introducing illegal vector types for a target and if we have to check the new type is legal?
> > 
> > 
> > I think that it should be fine, given that if the larger type was legal a smaller type with a power-of-2 size should be as well because it can always be promoted to a larger type if necessary. It's not obvious that we check the legality of using a vector of i64 (the default) as the induction variable in the first place?
> 
> Yeah it should be fine I think.
> 
> One more thing to double check: interleave count doens't have to be a power of 2, could you add some tests where the IC isn't a power of 2 (e.g.3, 5) to make sure the rounding works as expected even if IC * VF isn't a power-of-2?

Hmm - it's actually quite hard to get this to trigger in a test. For one thing, as discussed above this patch will not trigger when we are interleaving https://github.com/llvm/llvm-project/pull/118828#discussion_r1890350878 so there's currently not much to test when interleaving.

As well as this, I think that the main use-case for this optimization is when we are tail folding and the Vector IV of interest is the mask - however if IC * VF isn't a power of 2 in that case we will hit the assert here:
https://github.com/llvm/llvm-project/blob/72768d9bb8ad3e97a852270726f04d7167d9ef50/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp#L2470-L2471

Do you think it would be ok to merge as-is and leave supporting interleaving as a follow-up?

https://github.com/llvm/llvm-project/pull/118828