[llvm] [RISCV] Generate MIPS load/store pair instructions (PR #124717)

[Pengcheng Wang via llvm-commits]

https://github.com/wangpc-pp commented:

A thought:
The lowering path can be:
1.  Merge two consecutive load/stores into **pseudo** load/store pair instructions no matter what the offsets are.
2. Expand these pseudos in `RISCVExpandPseudo` by checking if their offsets are valid.

In this way, other vendor pair extensions like THead's can also benefit from this pass.

https://github.com/llvm/llvm-project/pull/124717