[llvm] bac6e7b - [RISCV][VLOpt] Put vmclr/vmset back in the RISCVVPseudo table. (#128293)
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Sat Feb 22 15:30:38 PST 2025
Author: Craig Topper
Date: 2025-02-22T15:30:35-08:00
New Revision: bac6e7b65178181a3af17020840604d5e9e13178
URL: https://github.com/llvm/llvm-project/commit/bac6e7b65178181a3af17020840604d5e9e13178
DIFF: https://github.com/llvm/llvm-project/commit/bac6e7b65178181a3af17020840604d5e9e13178.diff
LOG: [RISCV][VLOpt] Put vmclr/vmset back in the RISCVVPseudo table. (#128293)
This allows them to be supported by the VLOptimizer.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index 1795bf73d0a22..80c0e9e7bbb2a 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -554,13 +554,11 @@ class RISCVVPseudo {
Instruction BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
// SEW = 0 is used to denote that the Pseudo is not SEW specific (or unknown).
bits<8> SEW = 0;
- bit NeedBeInPseudoTable = 1;
}
// The actual table.
def RISCVVPseudosTable : GenericTable {
let FilterClass = "RISCVVPseudo";
- let FilterClassField = "NeedBeInPseudoTable";
let CppTypeName = "PseudoInfo";
let Fields = [ "Pseudo", "BaseInstr" ];
let PrimaryKey = [ "Pseudo" ];
@@ -1023,11 +1021,7 @@ class VPseudoNullaryPseudoM<string BaseInst> :
let hasSideEffects = 0;
let HasVLOp = 1;
let HasSEWOp = 1;
- // BaseInstr is not used in RISCVExpandPseudoInsts pass.
- // Just fill a corresponding real v-inst to pass tablegen check.
let BaseInstr = !cast<Instruction>(BaseInst);
- // We exclude them from RISCVVPseudoTable.
- let NeedBeInPseudoTable = 0;
}
class VPseudoUnaryNoMask<DAGOperand RetClass,
diff --git a/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll b/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
index c249b3c5376fc..6c5346d72aec4 100644
--- a/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
@@ -892,9 +892,8 @@ define <vscale x 2 x i32> @vpselect_trunc(<vscale x 2 x i32> %passthru, <vscale
define void @test_dag_loop() {
; CHECK-LABEL: test_dag_loop:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma
-; CHECK-NEXT: vmclr.m v0
; CHECK-NEXT: vsetivli zero, 0, e8, m4, ta, ma
+; CHECK-NEXT: vmclr.m v0
; CHECK-NEXT: vmv.v.i v8, 0
; CHECK-NEXT: vmv.v.i v12, 0
; CHECK-NEXT: vsetvli zero, zero, e8, m4, tu, mu
diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
index c84f7735b66d4..b39ba422bd349 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
@@ -1116,7 +1116,7 @@ body: |
bb.0:
; CHECK-LABEL: name: vmop_vv_passthru_use
; CHECK: %x:vrnov0 = PseudoVMAND_MM_B8 $noreg, $noreg, 1, 0 /* e8 */
- ; CHECK-NEXT: %y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1
+ ; CHECK-NEXT: %y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1 /* ta, mu */
; CHECK-NEXT: %z:vr = PseudoVMAND_MM_B8 %y, $noreg, 1, 0 /* e8 */
%x:vrnov0 = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0 /* e1 */
%y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1
@@ -1128,7 +1128,7 @@ body: |
bb.0:
; CHECK-LABEL: name: vmop_vv_passthru_use_incompatible_eew
; CHECK: %x:vrnov0 = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */
- ; CHECK-NEXT: %y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1
+ ; CHECK-NEXT: %y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1 /* ta, mu */
; CHECK-NEXT: %z:vr = PseudoVMAND_MM_B8 %y, $noreg, 1, 0 /* e8 */
%x:vrnov0 = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0
%y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1
@@ -1140,7 +1140,7 @@ body: |
bb.0:
; CHECK-LABEL: name: vmop_vv_passthru_use_incompatible_emul
; CHECK: %x:vrnov0 = PseudoVMAND_MM_B16 $noreg, $noreg, -1, 0 /* e8 */
- ; CHECK-NEXT: %y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1
+ ; CHECK-NEXT: %y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1 /* ta, mu */
; CHECK-NEXT: %z:vr = PseudoVMAND_MM_B8 %y, $noreg, 1, 0 /* e8 */
%x:vrnov0 = PseudoVMAND_MM_B16 $noreg, $noreg, -1, 0 /* e1 */
%y:vrnov0 = PseudoVMSEQ_VV_M1_MASK %x, $noreg, $noreg, $noreg, 1, 3 /* e8 */, 1
@@ -1742,3 +1742,63 @@ body: |
%x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0
%y:gpr = PseudoVCPOP_M_B16 %x, 1, 0
...
+---
+name: vmclr_m
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmclr_m
+ ; CHECK: %x:vr = PseudoVMCLR_M_B8 1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVMAND_MM_B8 $noreg, %x, 1, 0 /* e8 */
+ %x:vr = PseudoVMCLR_M_B8 -1, 0
+ %y:vr = PseudoVMAND_MM_B8 $noreg, %x, 1, 0
+...
+---
+name: vmclr_m_incompatible_eew
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmclr_m_incompatible_eew
+ ; CHECK: %x:vr = PseudoVMCLR_M_B8 -1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVADD_VV_M1 $noreg, $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */
+ %x:vr = PseudoVMCLR_M_B8 -1, 0
+ %y:vr = PseudoVADD_VV_M1 $noreg, $noreg, %x, 1, 3 /* e8 */, 0
+...
+---
+name: vmclr_m_incompatible_emul
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmclr_m_incompatible_emul
+ ; CHECK: %x:vr = PseudoVMCLR_M_B8 -1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVMAND_MM_B16 $noreg, %x, 1, 0 /* e8 */
+ %x:vr = PseudoVMCLR_M_B8 -1, 0
+ %y:vr = PseudoVMAND_MM_B16 $noreg, %x, 1, 0
+...
+---
+name: vmset_m
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmset_m
+ ; CHECK: %x:vr = PseudoVMSET_M_B8 1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVMAND_MM_B8 $noreg, %x, 1, 0 /* e8 */
+ %x:vr = PseudoVMSET_M_B8 -1, 0
+ %y:vr = PseudoVMAND_MM_B8 $noreg, %x, 1, 0
+...
+---
+name: vmset_m_incompatible_eew
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmset_m_incompatible_eew
+ ; CHECK: %x:vr = PseudoVMSET_M_B8 -1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVADD_VV_M1 $noreg, $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */
+ %x:vr = PseudoVMSET_M_B8 -1, 0
+ %y:vr = PseudoVADD_VV_M1 $noreg, $noreg, %x, 1, 3 /* e8 */, 0
+...
+---
+name: vmset_m_incompatible_emul
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmset_m_incompatible_emul
+ ; CHECK: %x:vr = PseudoVMSET_M_B8 -1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVMAND_MM_B16 $noreg, %x, 1, 0 /* e8 */
+ %x:vr = PseudoVMSET_M_B8 -1, 0
+ %y:vr = PseudoVMAND_MM_B16 $noreg, %x, 1, 0
+---
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