[llvm] AMDGPU: Restrict src0 to VGPRs only for certain cvt scale opcodes. (PR #127464)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -1818,6 +1818,18 @@ class getVOP3VRegSrcForVT<ValueType VT, bit IsTrue16 = 0, bit IsFake16 = 0> {
          1                 : RegisterOperand<VGPR_32>);
 }
 
+// VGPR only VOP3 src with 9 bit encoding
+class getVOP3VSrcReg9ForVT<ValueType VT> {
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rampitec wrote:

I just did it downstream with getVOP3VRegSrcForVT. I mean, VOP3 means 9 bits. Check this: 5d9fdcea7334180d3d5cc0dcf92cd770b3677a7e.

https://github.com/llvm/llvm-project/pull/127464