[llvm] [CodeGen] Remove AnalyzeVirtRegLanesInBundle (PR #127415)

[Kazu Hirata via llvm-commits]

https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/127415

The function has was added without a use in:

  commit 7dcb9c0f09f89e2d6f527a480f214cf872c85b20
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   Mon Mar 20 18:49:17 2023 -0400


>From 39b0cbda8341cd5c66afd42f555066d6d519d689 Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Sun, 16 Feb 2025 12:16:28 -0800
Subject: [PATCH] [CodeGen] Remove AnalyzeVirtRegLanesInBundle

The function has was added without a use in:

  commit 7dcb9c0f09f89e2d6f527a480f214cf872c85b20
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   Mon Mar 20 18:49:17 2023 -0400
---
 .../include/llvm/CodeGen/MachineInstrBundle.h |  7 -----
 llvm/lib/CodeGen/MachineInstrBundle.cpp       | 27 -------------------
 2 files changed, 34 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/MachineInstrBundle.h b/llvm/include/llvm/CodeGen/MachineInstrBundle.h
index 9685d1fd8a3e0..8a73f9a18f472 100644
--- a/llvm/include/llvm/CodeGen/MachineInstrBundle.h
+++ b/llvm/include/llvm/CodeGen/MachineInstrBundle.h
@@ -241,13 +241,6 @@ VirtRegInfo AnalyzeVirtRegInBundle(
     MachineInstr &MI, Register Reg,
     SmallVectorImpl<std::pair<MachineInstr *, unsigned>> *Ops = nullptr);
 
-/// Return a pair of lane masks (reads, writes) indicating which lanes this
-/// instruction uses with Reg.
-std::pair<LaneBitmask, LaneBitmask>
-AnalyzeVirtRegLanesInBundle(const MachineInstr &MI, Register Reg,
-                            const MachineRegisterInfo &MRI,
-                            const TargetRegisterInfo &TRI);
-
 /// Information about how a physical register Reg is used by a set of
 /// operands.
 struct PhysRegInfo {
diff --git a/llvm/lib/CodeGen/MachineInstrBundle.cpp b/llvm/lib/CodeGen/MachineInstrBundle.cpp
index 92189f6360683..bd2eb4897eaaf 100644
--- a/llvm/lib/CodeGen/MachineInstrBundle.cpp
+++ b/llvm/lib/CodeGen/MachineInstrBundle.cpp
@@ -304,33 +304,6 @@ VirtRegInfo llvm::AnalyzeVirtRegInBundle(
   return RI;
 }
 
-std::pair<LaneBitmask, LaneBitmask>
-llvm::AnalyzeVirtRegLanesInBundle(const MachineInstr &MI, Register Reg,
-                                  const MachineRegisterInfo &MRI,
-                                  const TargetRegisterInfo &TRI) {
-
-  LaneBitmask UseMask, DefMask;
-
-  for (const MachineOperand &MO : const_mi_bundle_ops(MI)) {
-    if (!MO.isReg() || MO.getReg() != Reg)
-      continue;
-
-    unsigned SubReg = MO.getSubReg();
-    if (SubReg == 0 && MO.isUse() && !MO.isUndef())
-      UseMask |= MRI.getMaxLaneMaskForVReg(Reg);
-
-    LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(SubReg);
-    if (MO.isDef()) {
-      if (!MO.isUndef())
-        UseMask |= ~SubRegMask;
-      DefMask |= SubRegMask;
-    } else if (!MO.isUndef())
-      UseMask |= SubRegMask;
-  }
-
-  return {UseMask, DefMask};
-}
-
 PhysRegInfo llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg,
                                          const TargetRegisterInfo *TRI) {
   bool AllDefsDead = true;