[llvm] [AArch64] Add support for SHF_AARCH64_PURECODE ELF section flag (1/3) (PR #125687)

[Peter Smith via llvm-commits]

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Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/125687 at github.com>


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@@ -284,7 +288,18 @@ bool AArch64TTIImpl::areInlineCompatible(const Function *Caller,
       return false;
   }
 
-  return BaseT::areInlineCompatible(Caller, Callee);
+  const TargetMachine &TM = getTLI()->getTargetMachine();
+  const FeatureBitset &CallerBits =
+      TM.getSubtargetImpl(*Caller)->getFeatureBits();
+  const FeatureBitset &CalleeBits =
+      TM.getSubtargetImpl(*Callee)->getFeatureBits();
+  // Adjust the feature bitsets by inverting some of the bits. This is needed
+  // for target features that represent restrictions rather than capabilities,
+  // for example "+execute-only".
----------------
smithp35 wrote:

It could be worth extending the example. 
```
for example a "+execute-only" callee can be inlined into a caller without "+execute-only", but not vice versa.
``` 

https://github.com/llvm/llvm-project/pull/125687