[llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)

[Princeton Ferro via llvm-commits]

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@@ -818,6 +821,10 @@ def step_vector : SDNode<"ISD::STEP_VECTOR", SDTypeProfile<1, 1,
 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
                               []>;
 
+def build_pair : SDNode<"ISD::BUILD_PAIR", SDTypeProfile<1, 2,
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Prince781 wrote:

Here I'm using it to replace `BUILD_VECTOR` as I'll be lowering it to a packing `mov.b64` later. It's very useful compared to defining a new opcode in NVPTXISD.

https://github.com/llvm/llvm-project/pull/126337