[llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)

[Princeton Ferro via llvm-commits]

Prince781 wrote:

@AlexMaclean what led me to this implementation (and I did try it the other way) is that v2f16 and v2bf16 are supported by many kinds of instructions, so it makes more sense to legalize these types than v2f32. My concern is whether this feature should change code that uses f32 vectors but avoids these operations. Legalizing this type requires me to change some things in how we lower instructions, like loads and stores (for example, if we don't want `ld.v2.f32` to always become `ld.b64`), override a few things in TLI, etc. 

See the test cases for more examples. If this is not a concern, then I can implement it the other way.

https://github.com/llvm/llvm-project/pull/126337