[llvm] [AMDGPU] - Fix non-deterministic compile issue (PR #126271)

[David Stuttard via llvm-commits]

https://github.com/dstutt created https://github.com/llvm/llvm-project/pull/126271

4ce1f9079d4d3 [AMDGPU] Allow rematerialization of instructions with virtual register uses (#124327)
made changes that require an ordered traversal of a DenseMap. Changing it to MapVector which
respects insertion order.


>From 0e1ba96be2d1020996c12e1c4c4ffa33bfd98e16 Mon Sep 17 00:00:00 2001
From: David Stuttard <david.stuttard at amd.com>
Date: Fri, 7 Feb 2025 15:46:18 +0000
Subject: [PATCH] [AMDGPU] - Fix non-deterministic compile issue
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4ce1f9079d4d3 [AMDGPU] Allow rematerialization of instructions with virtual register uses (#124327)
made changes that require an ordered traversal of a DenseMap. Changing it to MapVector which
respects insertion order.
---
 llvm/lib/Target/AMDGPU/GCNSchedStrategy.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
index 7d3e63df43da60d..e3da8d300562937 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
@@ -442,7 +442,7 @@ class PreRARematStage : public GCNSchedStage {
 
   // Map a trivially rematerializable def to a list of regions at MinOccupancy
   // that has the defined reg as a live-in.
-  DenseMap<MachineInstr *, SmallVector<unsigned, 4>> RematDefToLiveInRegions;
+  MapVector<MachineInstr *, SmallVector<unsigned, 4>> RematDefToLiveInRegions;
 
   // Collect all trivially rematerializable VGPR instructions with a single def
   // and single use outside the defining block into RematerializableInsts.