[llvm] [SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (PR #125207)

[Paul Walker via llvm-commits]

================
@@ -22010,8 +22019,11 @@ static SDValue performIntrinsicCombine(SDNode *N,
       return Dot;
     if (SDValue WideAdd = tryLowerPartialReductionToWideAdd(N, Subtarget, DAG))
       return WideAdd;
-    return DAG.getPartialReduceAdd(SDLoc(N), N->getValueType(0),
-                                   N->getOperand(1), N->getOperand(2));
+    SDLoc DL(N);
+    SDValue Input = N->getOperand(2);
+    return DAG.getNode(ISD::PARTIAL_REDUCE_UMLA, DL, N->getValueType(0),
+                       N->getOperand(1), Input,
+                       DAG.getConstant(1, DL, Input.getValueType()));
----------------
paulwalker-arm wrote:

Up to you but you could simplify this to just:
```
return DAG.getNode(ISD::PARTIAL_REDUCE_UMLA, SDLoc(N), N->getValueType(0),
                   N->getOperand(1), N->getOperand(2)
                   DAG.getConstant(1, DL, Input.getValueType()));
```

https://github.com/llvm/llvm-project/pull/125207