[llvm] [SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (PR #125207)

[Paul Walker via llvm-commits]

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@@ -22010,8 +22027,13 @@ static SDValue performIntrinsicCombine(SDNode *N,
       return Dot;
     if (SDValue WideAdd = tryLowerPartialReductionToWideAdd(N, Subtarget, DAG))
       return WideAdd;
-    return DAG.getPartialReduceAdd(SDLoc(N), N->getValueType(0),
-                                   N->getOperand(1), N->getOperand(2));
+    const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+    SDLoc DL(N);
+    SDValue Input = N->getOperand(2);
+    SDValue PRVal = DAG.getNode(ISD::PARTIAL_REDUCE_UMLA, DL,
+                                N->getValueType(0), N->getOperand(1), Input,
+                                DAG.getConstant(1, DL, Input.getValueType()));
+    return TLI.expandPartialReduceMLA(PRVal.getNode(), DAG);
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paulwalker-arm wrote:

Is this necessary? I'd expect to be able to return the `PARTIAL_REDUCE_UMLA` result and then let legalisation expand it later.

https://github.com/llvm/llvm-project/pull/125207