[llvm] [AMDGPU] Stop adding implicit def of superreg in copyPhysReg (PR #125255)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 5 05:10:53 PST 2025
arsenm wrote:
> What exactly is the `liveness verification` mentioned here and in the patch [e56e902](https://github.com/llvm/llvm-project/commit/e56e9022bc54c575ad8ecc3934e9cf84b8542e62)? Is there any codegen pass that verifies the liveness of tuple and their subregs when a Pseudo instruction for tuples is expanded into smaller chunks?
It's just MachineVerifier
https://github.com/llvm/llvm-project/pull/125255
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