[llvm] [AMDGPU] Stop adding implicit def of superreg in copyPhysReg (PR #125255)

[Christudasan Devadasan via llvm-commits]

cdevadas wrote:

What exactly is the  `liveness verification` mentioned here and in the patch https://github.com/llvm/llvm-project/commit/e56e9022bc54c575ad8ecc3934e9cf84b8542e62?
Is there any codegen pass that verifies the liveness of tuple and their subregs when a Pseudo instruction for tuples is expanded into smaller chunks?
I'm trying to see if a tuple is divided into individual registers when we lower such operations, should we bound all of their liveness to the entire instructions we newly introduce? I don't see a need for this `implicit-def` otherwise.



https://github.com/llvm/llvm-project/pull/125255