[llvm] Nvptx port LowerBITCAST to SelectionDAG (PR #120903)

[Simon Pilgrim via llvm-commits]

================
@@ -910,6 +911,83 @@ SDValue DAGTypeLegalizer::CreateStackStoreLoad(SDValue Op,
   return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(), Align);
 }
 
+SDValue DAGTypeLegalizer::LowerBitcastInRegister(SDNode *N) const {
+  // Lower a bitcast into in-register shift operations
+  assert(N->getOpcode() == ISD::BITCAST && "Unexpected opcode!");
+
+  EVT FromVT = N->getOperand(0)->getValueType(0);
+  EVT ToVT = N->getValueType(0);
+
+  SDLoc DL(N);
+
+  bool IsBigEndian = DAG.getDataLayout().isBigEndian();
+
+  if (FromVT.isVector() && ToVT.isScalarInteger()) {
+
----------------
RKSimon wrote:

Before trying splitting/packing - how well does this work for Vector->ScalarInteger?
```
    if (!IsBigEndian) {
      EVT ToVecVT = EVT::getVectorVT(*DAG.getContext(), ToVT, 1);
      return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ToVT,
                         DAG.getBitcast(ToVecVT, N->getOperand(0)),
                         DAG.getVectorIdxConstant(0, DL));
    }
```

https://github.com/llvm/llvm-project/pull/120903