[llvm] Nvptx port LowerBITCAST to SelectionDAG (PR #120903)

[Simon Pilgrim via llvm-commits]

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@@ -910,6 +911,83 @@ SDValue DAGTypeLegalizer::CreateStackStoreLoad(SDValue Op,
   return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(), Align);
 }
 
+SDValue DAGTypeLegalizer::LowerBitcastInRegister(SDNode *N) const {
+  // Lower a bitcast into in-register shift operations
+  assert(N->getOpcode() == ISD::BITCAST && "Unexpected opcode!");
+
+  EVT FromVT = N->getOperand(0)->getValueType(0);
+  EVT ToVT = N->getValueType(0);
+
+  SDLoc DL(N);
+
+  bool IsBigEndian = DAG.getDataLayout().isBigEndian();
+
+  if (FromVT.isVector() && ToVT.isScalarInteger()) {
+
+    EVT ElemVT = FromVT.getVectorElementType();
+    unsigned NumElems = FromVT.getVectorNumElements();
+    unsigned ElemBits = ElemVT.getSizeInBits();
+
+    unsigned PackedBits = ToVT.getSizeInBits();
+    assert(PackedBits >= ElemBits * NumElems &&
+           "Scalar type does not have enough bits to pack vector values.");
+
+    EVT PackVT = EVT::getIntegerVT(*DAG.getContext(), ElemBits * NumElems);
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RKSimon wrote:

How can PackVT != ToVT if its a scalar integer?

https://github.com/llvm/llvm-project/pull/120903