[llvm] [WIP][RISCV] Support for zvzip fasttrack proposal (PR #124140)

[Craig Topper via llvm-commits]

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@@ -5549,6 +5658,53 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG,
     }
   }
 
+  if (Subtarget.hasStdExtZvzip())  {
+    // If this is a deinterleave(2) - possibly with two distinct sources, and
+    // possibly at e64 - match to the vunzip2a/vunzip2b.  Put this after the
+    // vnsrl matching as that's probably still a better canonical form.
+    // Note that we have a problem with the definition of this instruction.
+    // If VL is not a register boundary, the first half of first source and
+    // second half of second source is not the same as treating the pair
+    // of registers as a register group with the standard prefix layout.
+    unsigned Index = 0;
+    if (ShuffleVectorInst::isDeInterleaveMaskOfFactor(Mask, 2, Index) &&
+        1 < count_if(Mask, [](int Idx) { return Idx != -1; })) {
+      const unsigned EltSize = VT.getScalarSizeInBits();
+      const unsigned MinVLMAX = Subtarget.getRealMinVLen() / EltSize;
+      bool KnownLayout = false;
+      if (auto VLEN = Subtarget.getRealVLen())
+        KnownLayout = VT.getSizeInBits().getKnownMinValue() % *VLEN == 0;
+      unsigned Opc = Index == 0 ?
+          RISCVISD::VUNZIP2A_VL : RISCVISD::VUNZIP2B_VL;
+      if (V2.isUndef() || KnownLayout) {
+        return lowerZVZIP(Opc, V1, V2, DL, DAG, Subtarget);
+      } else if (NumElts < MinVLMAX) {
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topperc wrote:

No else after return

https://github.com/llvm/llvm-project/pull/124140