[llvm] [llvm][Docs] Release note for LLDB optionally disabled regsets for RV64 (PR #123363)

[Alexey Merzlyakov via llvm-commits]

https://github.com/AlexeyMerzlyakov updated https://github.com/llvm/llvm-project/pull/123363

>From afa40f13a7d39bb3e2a7b238ba947d8311c1d779 Mon Sep 17 00:00:00 2001
From: Alexey Merzlyakov <alexey.merzlyakov at samsung.com>
Date: Fri, 17 Jan 2025 19:00:47 +0300
Subject: [PATCH 1/2] [llvm][Docs] Release note for LLDB optionally disabled
 regsets for RV64

---
 llvm/docs/ReleaseNotes.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index 8f88b824f965aa..483fae509dccd7 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -483,6 +483,8 @@ Changes to LLDB
   to be opened in the firewall (one for the `lldb-server` platform, one for gdbserver connections).
   In addition, due to this work, `lldb-server` now works on Windows in the server mode.
 
+* LLDB now supports optionally enabled/disabled register sets (particularly FPR) for RISC-V 64. The situation might take place for RISC-V builds having no FP-registers, like RV64IMAC or RV64IMACV. The change is applied to native debugging or core-file usage. EmulateInstruction is out of scope of the change, so its behavior remains the same using the maximum set of registers.
+
 Changes to BOLT
 ---------------------------------
 

>From 503c478245b2116470a7b2b8dad15d433c84291f Mon Sep 17 00:00:00 2001
From: Alexey Merzlyakov <alexey.merzlyakov at samsung.com>
Date: Wed, 22 Jan 2025 11:08:40 +0300
Subject: [PATCH 2/2] Meet review comment

---
 llvm/docs/ReleaseNotes.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index 483fae509dccd7..3267fd21719841 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -483,7 +483,7 @@ Changes to LLDB
   to be opened in the firewall (one for the `lldb-server` platform, one for gdbserver connections).
   In addition, due to this work, `lldb-server` now works on Windows in the server mode.
 
-* LLDB now supports optionally enabled/disabled register sets (particularly FPR) for RISC-V 64. The situation might take place for RISC-V builds having no FP-registers, like RV64IMAC or RV64IMACV. The change is applied to native debugging or core-file usage. EmulateInstruction is out of scope of the change, so its behavior remains the same using the maximum set of registers.
+* LLDB now supports optionally enabled/disabled register sets (particularly floating point registers) for RISC-V 64. This happens for targets like RV64IMAC or RV64IMACV, that have no floating point registers. The change is applied to native debugging and core-file usage.
 
 Changes to BOLT
 ---------------------------------