[llvm] [AMDGPU] Reject misaligned SGPR constraints for inline asm (PR #123590)

[Matt Arsenault via llvm-commits]

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@@ -15877,7 +15877,7 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
             RC = TRI->getAGPRClassForBitWidth(Width);
           if (RC) {
             Reg = TRI->getMatchingSuperReg(Reg, AMDGPU::sub0, RC);
-            if (Reg == 0U) {
+            if (!Reg ) {
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arsenm wrote:

```suggestion
            if (!Reg) {
```

https://github.com/llvm/llvm-project/pull/123590