[clang] [llvm] [RISCV] Add processor definition for XiangShan-KunMingHu-V2R2 (PR #123193)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 17 00:35:17 PST 2025


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@@ -553,6 +553,37 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu",
                                             TuneZExtWFusion,
                                             TuneShiftedZExtWFusion]>;
 
+def XIANGSHAN_KUNMINGHU : RISCVProcessorModel<"xiangshan-kunminghu",
+                                          NoSchedModel,
+                                          !listconcat(!listremove(RVA23S64Features,
+                                                      [FeatureStdExtZiccamoa,
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wangpc-pp wrote:

Then I think we should wait for the freeze of features. I don't think we will accept an intermediate version.

https://github.com/llvm/llvm-project/pull/123193


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