[llvm] Add to/from SR instr usage and SR uses/defs (PR #122605)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 15 16:51:06 PST 2025


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff ba58d35019ae40641ae454472a43965a7bee5696 221f07cbd954167460476f9b66a95a2db2011582 --extensions h,cpp -- llvm/lib/Target/M68k/M68kInstrInfo.cpp llvm/lib/Target/M68k/M68kSubtarget.h
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.cpp b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
index e83f2a7d81..240a5394d5 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
@@ -760,7 +760,8 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   bool ToCCR = DstReg == M68k::CCR;
   bool ToSR = DstReg == M68k::SR;
 
-  assert((FromCCR+FromSR+ToCCR+ToSR) <= 1 && "Copies may only touch one of either SR or CCR");
+  assert((FromCCR + FromSR + ToCCR + ToSR) <= 1 &&
+         "Copies may only touch one of either SR or CCR");
 
   if (FromCCR) {
     if (M68k::DR8RegClass.contains(DstReg)) {

``````````

</details>


https://github.com/llvm/llvm-project/pull/122605


More information about the llvm-commits mailing list