[llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #120690)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 14 06:09:40 PST 2025
================
@@ -345,9 +347,11 @@
; GCN-O1-NEXT: Slot index numbering
; GCN-O1-NEXT: Live Interval Analysis
; GCN-O1-NEXT: Machine Natural Loop Construction
+; GCN-O1-NEXT: Machine Register Class Info Analysis
; GCN-O1-NEXT: Register Coalescer
; GCN-O1-NEXT: Rename Disconnected Subregister Components
; GCN-O1-NEXT: Rewrite Partial Register Uses
+; GCN-O1-NEXT: Machine Register Class Info Analysis
----------------
arsenm wrote:
> I haven't make regalloc use this pass yet so there is no worry about this currently.
I don't follow. It's a bunch of addPreserved or another preserves-CFG like field, it's merely annoying. You will need something to avoid the recomputatio
https://github.com/llvm/llvm-project/pull/120690
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