[llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #120690)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 14 05:47:50 PST 2025
================
@@ -345,9 +347,11 @@
; GCN-O1-NEXT: Slot index numbering
; GCN-O1-NEXT: Live Interval Analysis
; GCN-O1-NEXT: Machine Natural Loop Construction
+; GCN-O1-NEXT: Machine Register Class Info Analysis
; GCN-O1-NEXT: Register Coalescer
; GCN-O1-NEXT: Rename Disconnected Subregister Components
; GCN-O1-NEXT: Rewrite Partial Register Uses
+; GCN-O1-NEXT: Machine Register Class Info Analysis
----------------
arsenm wrote:
How else would the pass manager know it doesn't invalidate the pass? Does not use the analysis does not imply it cannot be invalidated
https://github.com/llvm/llvm-project/pull/120690
More information about the llvm-commits
mailing list