[llvm] [Xtensa] Implement Windowed Register Option. (PR #121118)

Min-Yih Hsu via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 26 10:00:30 PST 2024


================
@@ -678,3 +678,124 @@ let isReturn = 1, isTerminator = 1,
     let t = 0;
   }
 }
+
+//===----------------------------------------------------------------------===//
+// Windowed instructions
+//===----------------------------------------------------------------------===//
+
+def ENTRY : BRI12_Inst<0x06, 0x3, 0x0, (outs), (ins AR:$s, entry_imm12:$imm),
+                     "entry\t$s, $imm", []>, Requires<[HasWindowed]> {
+  bits<15> imm;
+
+  let imm12{11-0} = imm{14-3};
+  let Defs = [SP];
+}
+
+let isCall = 1, Defs = [A0] in {
+  def CALL4 : CALL_Inst<0x05, (outs), (ins pcrel32call:$offset),
+                      "call4\t$offset", []>, Requires<[HasWindowed]> {
+    let n = 1;
+  }
+
+  def CALL8 : CALL_Inst<0x05, (outs), (ins pcrel32call:$offset),
+                       "call8\t$offset", []>, Requires<[HasWindowed]> {
+    let n = 2;
+  }
+
+  def CALL12 : CALL_Inst<0x05, (outs), (ins pcrel32call:$offset),
+                        "call12\t$offset", []>, Requires<[HasWindowed]> {
+    let n = 3;
+  }
----------------
mshockwave wrote:

do you want to factor out the common parts and use a foreach loop instead?

https://github.com/llvm/llvm-project/pull/121118


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