[llvm] [TableGen][GISel] Learn to import patterns with physreg defs (PR #120343)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> The register class containing the register is the only register class containing this register, and it is not allocatable. That is, there are no sub- or super-classes containing this register to iterate over.






> 
> I seem to need a "cross copy" register class. There is a `TargetRegisterInfo::getCrossCopyRegClass`, which I thought may be lifted to TableGen level, but some targets that override it (AMDGPU in particular) choose a register class based on dynamic values such as subtarget features.

Both of the AMDGPU cases look like hacks to me. In particular the SCC_CLASS handling does not do what we would want to do in globalisel. (I should probably try removing this but will likely never get around to it)

> 
> The current idea is to first try `getMinimalPhysRegClass` and resort to cross-copy register class if it fails to find an allocatable class. Does this sound like the way to go or should I look for another solution?

Some kind of fallback process makes sense to me. In tablegen getRegClassToRegister, find an allocatable superclass, and if one isn't available just find something you can copy to. The allocation processes later can adjust the exact classes anyway,=



https://github.com/llvm/llvm-project/pull/120343