[llvm] [TableGen][GISel] Learn to import patterns with physreg defs (PR #120343)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 23 02:47:39 PST 2024


s-barannikov wrote:

So I tried.

The register class containing the register is the only register class containing this register, and it is not allocatable. That is, there are no sub- or super-classes containing this register to iterate over.

I seem to need a "cross copy" register class. There is a `TargetRegisterInfo::getCrossCopyRegClass`, which I thought may be lifted to TableGen level, but some targets that override it (AMDGPU in particular) choose a register class based on dynamic values such as subtarget features.

This may not be a big issue, we could still have a notion of "cross copy" register class at TableGen level, which could be used in cases like this.

The current idea is to first try `getMinimalPhysRegClass` and resort to cross-copy register class if it fails to find an allocatable class. Does this sound like the way to go or should I look for another solution?


https://github.com/llvm/llvm-project/pull/120343


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