[llvm] VT: teach implied-cond about samesign (PR #120120)

[Ramkumar Ramachandra via llvm-commits]

artagnon wrote:

> > Since all callers of these functions operate on CmpInst::Predicate, this patch does not introduce functional changes.
> 
> Can you please update the callers so that it _does_ introduce functional changes and we can test this code?

Pushed the change that I extracted the original patch from.

https://github.com/llvm/llvm-project/pull/120120