[llvm] [AArch64] Extend vecreduce to udot/sdot transformation to support usdot (PR #120094)

[Igor Kirillov via llvm-commits]

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@@ -2866,6 +4497,362 @@ entry:
   %x = add i32 %r1, %r2
   ret i32 %x
 }
+
+define i32 @test_usdot_v33i8(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %sum) {
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igogo-x86 wrote:

Probably not, but should the same rule be applied to duplicates of `dot`/`sdot`? Which test do you think would be enough to keep?

https://github.com/llvm/llvm-project/pull/120094