[llvm] [AArch64] Extend vecreduce to udot/sdot transformation to support usdot (PR #120094)

[Igor Kirillov via llvm-commits]

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@@ -860,19 +1213,253 @@ entry:
   ret i32 %x
 }
 
-define i32 @test_udot_v24i8(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %sum) {
-; CHECK-SD-LABEL: test_udot_v24i8:
+
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igogo-x86 wrote:

I didn't change the original tests; that's `git diff` doing a poor job. Running `git diff --minimal` gives better representation

https://github.com/llvm/llvm-project/pull/120094