[llvm] [TableGen][GISel] Don't use std::optional with pointers (NFC) (PR #120026)

via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 15 16:19:37 PST 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff 8daf4f16fa08b5d876e98108721dd1743a360326 f165172625b53d3d80703c8a9aa6361690d832b8 --extensions cpp,h -- llvm/utils/TableGen/Common/CodeGenTarget.cpp llvm/utils/TableGen/Common/CodeGenTarget.h llvm/utils/TableGen/GlobalISelEmitter.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/utils/TableGen/Common/CodeGenTarget.cpp b/llvm/utils/TableGen/Common/CodeGenTarget.cpp
index ffb77d0b6e..96829a185a 100644
--- a/llvm/utils/TableGen/Common/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenTarget.cpp
@@ -163,7 +163,7 @@ CodeGenRegBank &CodeGenTarget::getRegBank() const {
   return *RegBank;
 }
 
-const CodeGenRegisterClass * CodeGenTarget::getSuperRegForSubReg(
+const CodeGenRegisterClass *CodeGenTarget::getSuperRegForSubReg(
     const ValueTypeByHwMode &ValueTy, CodeGenRegBank &RegBank,
     const CodeGenSubRegIndex *SubIdx, bool MustBeAllocatable) const {
   std::vector<CodeGenRegisterClass *> Candidates;
diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index c34155ce36..a6972e2f53 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -1900,8 +1900,7 @@ GlobalISelEmitter::inferRegClassFromPattern(const TreePatternNode &N) {
   return nullptr;
 }
 
-const CodeGenRegisterClass *
-GlobalISelEmitter::inferSuperRegisterClass(
+const CodeGenRegisterClass *GlobalISelEmitter::inferSuperRegisterClass(
     const TypeSetByHwMode &Ty, const TreePatternNode &SubRegIdxNode) {
   // We need a ValueTypeByHwMode for getSuperRegForSubReg.
   if (!Ty.isValueTypeByHwMode(false))
@@ -1933,7 +1932,7 @@ const CodeGenRegisterClass *GlobalISelEmitter::inferSuperRegisterClassForNode(
   return inferSuperRegisterClass(Ty, SubRegIdxNode);
 }
 
-const CodeGenSubRegIndex * GlobalISelEmitter::inferSubRegIndexForNode(
+const CodeGenSubRegIndex *GlobalISelEmitter::inferSubRegIndexForNode(
     const TreePatternNode &SubRegIdxNode) {
   if (!SubRegIdxNode.isLeaf())
     return nullptr;

``````````

</details>


https://github.com/llvm/llvm-project/pull/120026


More information about the llvm-commits mailing list