[llvm] f1987c7 - [XCore,test] Change llc -march= to -mtriple=
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 15 10:31:43 PST 2024
Author: Fangrui Song
Date: 2024-12-15T10:31:38-08:00
New Revision: f1987c74ee5637ec248675a9a7070654167a5260
URL: https://github.com/llvm/llvm-project/commit/f1987c74ee5637ec248675a9a7070654167a5260
DIFF: https://github.com/llvm/llvm-project/commit/f1987c74ee5637ec248675a9a7070654167a5260.diff
LOG: [XCore,test] Change llc -march= to -mtriple=
Similar to 806761a7629df268c8aed49657aeccffa6bca449
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple (e.g. Windows, macOS),
leaving a target triple which may not make sense.
Therefore, -march= is error-prone and not recommended for tests without a target
triple. The issue has been benign as we recognize xcore-apple-darwin as ELF instead
of rejecting it outrightly.
Added:
Modified:
llvm/test/CodeGen/XCore/2008-11-17-Shl64.ll
llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
llvm/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
llvm/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
llvm/test/CodeGen/XCore/2009-07-15-store192.ll
llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
llvm/test/CodeGen/XCore/DbgValueOtherTargets.test
llvm/test/CodeGen/XCore/addsub64.ll
llvm/test/CodeGen/XCore/aliases.ll
llvm/test/CodeGen/XCore/align.ll
llvm/test/CodeGen/XCore/alignment.ll
llvm/test/CodeGen/XCore/ashr.ll
llvm/test/CodeGen/XCore/atomic.ll
llvm/test/CodeGen/XCore/basictest.ll
llvm/test/CodeGen/XCore/bigstructret.ll
llvm/test/CodeGen/XCore/bitrev.ll
llvm/test/CodeGen/XCore/byVal.ll
llvm/test/CodeGen/XCore/call.ll
llvm/test/CodeGen/XCore/constants.ll
llvm/test/CodeGen/XCore/events.ll
llvm/test/CodeGen/XCore/exception.ll
llvm/test/CodeGen/XCore/fneg.ll
llvm/test/CodeGen/XCore/getid.ll
llvm/test/CodeGen/XCore/globals.ll
llvm/test/CodeGen/XCore/indirectbr.ll
llvm/test/CodeGen/XCore/inline-asm.ll
llvm/test/CodeGen/XCore/inlineasm-output-template.ll
llvm/test/CodeGen/XCore/ladd_lsub_combine.ll
llvm/test/CodeGen/XCore/licm-ldwcp.ll
llvm/test/CodeGen/XCore/linkage.ll
llvm/test/CodeGen/XCore/llvm-intrinsics.ll
llvm/test/CodeGen/XCore/load.ll
llvm/test/CodeGen/XCore/memcpy.ll
llvm/test/CodeGen/XCore/misc-intrinsics.ll
llvm/test/CodeGen/XCore/mkmsk.ll
llvm/test/CodeGen/XCore/mul64.ll
llvm/test/CodeGen/XCore/offset_folding.ll
llvm/test/CodeGen/XCore/private.ll
llvm/test/CodeGen/XCore/ps-intrinsics.ll
llvm/test/CodeGen/XCore/resources.ll
llvm/test/CodeGen/XCore/resources_combine.ll
llvm/test/CodeGen/XCore/section-name.ll
llvm/test/CodeGen/XCore/sext.ll
llvm/test/CodeGen/XCore/shedulingPreference.ll
llvm/test/CodeGen/XCore/sr-intrinsics.ll
llvm/test/CodeGen/XCore/store.ll
llvm/test/CodeGen/XCore/switch.ll
llvm/test/CodeGen/XCore/switch_long.ll
llvm/test/CodeGen/XCore/tls.ll
llvm/test/CodeGen/XCore/trampoline.ll
llvm/test/CodeGen/XCore/trap.ll
llvm/test/CodeGen/XCore/unaligned_load.ll
llvm/test/CodeGen/XCore/unaligned_store.ll
llvm/test/CodeGen/XCore/unaligned_store_combine.ll
llvm/test/CodeGen/XCore/varargs.ll
llvm/test/CodeGen/XCore/zext.ll
llvm/test/CodeGen/XCore/zextfree.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/XCore/2008-11-17-Shl64.ll b/llvm/test/CodeGen/XCore/2008-11-17-Shl64.ll
index 04b1b5a0016e26..c21add79d99ba6 100644
--- a/llvm/test/CodeGen/XCore/2008-11-17-Shl64.ll
+++ b/llvm/test/CodeGen/XCore/2008-11-17-Shl64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
; PR3080
define i64 @test(i64 %a) {
%result = shl i64 %a, 1
diff --git a/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll b/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
index e81dbd8d373c78..43d6fdce7d7702 100644
--- a/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
+++ b/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
;; This caused a compilation failure since the
;; address arithmetic was folded into the LDWSP instruction,
;; resulting in a negative offset which eliminateFrameIndex was
diff --git a/llvm/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll b/llvm/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
index b2bbcb1183d19a..e17c9fb2b439b1 100644
--- a/llvm/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
+++ b/llvm/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
; PR3324
define double @f1(double %a, double %b, double %c, double %d, double %e, double %f, double %g) nounwind {
entry:
diff --git a/llvm/test/CodeGen/XCore/2009-03-27-v2f64-param.ll b/llvm/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
index e35a36a8a159d6..e367d0bf0639a4 100644
--- a/llvm/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
+++ b/llvm/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
; PR3898
define i32 @vector_param(<2 x double> %x) nounwind {
diff --git a/llvm/test/CodeGen/XCore/2009-07-15-store192.ll b/llvm/test/CodeGen/XCore/2009-07-15-store192.ll
index d3a346e8ef6c42..481c6784022e56 100644
--- a/llvm/test/CodeGen/XCore/2009-07-15-store192.ll
+++ b/llvm/test/CodeGen/XCore/2009-07-15-store192.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore > %t1.s
+; RUN: llc < %s -mtriple=xcore > %t1.s
define void @store32(ptr %p) nounwind {
entry:
store i192 0, ptr %p, align 4
diff --git a/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll b/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
index ea67d2ea234e92..e849cb34d0f431 100644
--- a/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
+++ b/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
target triple = "xcore-xmos-elf"
diff --git a/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll b/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
index 57a3ed7c7e3b5c..ecb53fc4f40fba 100644
--- a/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
+++ b/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
%struct.st = type <{ i8, i32, i8, i32, i8, i32 }>
@x = external global %struct.st, align 4
diff --git a/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll b/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
index 73ac3773eacfec..55e333c03185f7 100644
--- a/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
+++ b/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
declare void @g()
declare ptr @llvm.stacksave() nounwind
diff --git a/llvm/test/CodeGen/XCore/DbgValueOtherTargets.test b/llvm/test/CodeGen/XCore/DbgValueOtherTargets.test
index 7c2ecd0312c605..8713f5803e7f3b 100644
--- a/llvm/test/CodeGen/XCore/DbgValueOtherTargets.test
+++ b/llvm/test/CodeGen/XCore/DbgValueOtherTargets.test
@@ -1 +1 @@
-RUN: llc -O0 -march=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
+RUN: llc -O0 -mtriple=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
diff --git a/llvm/test/CodeGen/XCore/addsub64.ll b/llvm/test/CodeGen/XCore/addsub64.ll
index 89271cea3338c1..8d592e43935aa5 100644
--- a/llvm/test/CodeGen/XCore/addsub64.ll
+++ b/llvm/test/CodeGen/XCore/addsub64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define i64 @add64(i64 %a, i64 %b) {
%result = add i64 %a, %b
ret i64 %result
diff --git a/llvm/test/CodeGen/XCore/aliases.ll b/llvm/test/CodeGen/XCore/aliases.ll
index 445fbdc0579c3c..11cb5cbb7b080f 100644
--- a/llvm/test/CodeGen/XCore/aliases.ll
+++ b/llvm/test/CodeGen/XCore/aliases.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define void @a_val() nounwind {
ret void
}
diff --git a/llvm/test/CodeGen/XCore/align.ll b/llvm/test/CodeGen/XCore/align.ll
index 53efa3962909bd..e0d1434050a315 100644
--- a/llvm/test/CodeGen/XCore/align.ll
+++ b/llvm/test/CodeGen/XCore/align.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; CHECK: .p2align 2
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/XCore/alignment.ll b/llvm/test/CodeGen/XCore/alignment.ll
index 0c561ee4f6c6a5..416aa62f08c47e 100644
--- a/llvm/test/CodeGen/XCore/alignment.ll
+++ b/llvm/test/CodeGen/XCore/alignment.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=xcore 2>&1 | FileCheck %s
; CHECK: emitPrologue unsupported alignment: 8
define void @f() nounwind {
diff --git a/llvm/test/CodeGen/XCore/ashr.ll b/llvm/test/CodeGen/XCore/ashr.ll
index f4247dc2a0890c..55669109e84d6d 100644
--- a/llvm/test/CodeGen/XCore/ashr.ll
+++ b/llvm/test/CodeGen/XCore/ashr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -asm-verbose=0 | FileCheck %s
define i32 @ashr(i32 %a, i32 %b) nounwind {
%1 = ashr i32 %a, %b
ret i32 %1
diff --git a/llvm/test/CodeGen/XCore/atomic.ll b/llvm/test/CodeGen/XCore/atomic.ll
index 8c11e43f52acbe..a3600a6e7d7546 100644
--- a/llvm/test/CodeGen/XCore/atomic.ll
+++ b/llvm/test/CodeGen/XCore/atomic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; CHECK-LABEL: atomic_fence
; CHECK: #MEMBARRIER
diff --git a/llvm/test/CodeGen/XCore/basictest.ll b/llvm/test/CodeGen/XCore/basictest.ll
index de5eaff08073d6..33262367e9e864 100644
--- a/llvm/test/CodeGen/XCore/basictest.ll
+++ b/llvm/test/CodeGen/XCore/basictest.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
define i32 @test(i32 %X) {
%tmp.1 = add i32 %X, 1
diff --git a/llvm/test/CodeGen/XCore/bigstructret.ll b/llvm/test/CodeGen/XCore/bigstructret.ll
index 567b3720919595..69f7b1c7682558 100644
--- a/llvm/test/CodeGen/XCore/bigstructret.ll
+++ b/llvm/test/CodeGen/XCore/bigstructret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
%0 = type { i32, i32, i32, i32 }
%1 = type { i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/XCore/bitrev.ll b/llvm/test/CodeGen/XCore/bitrev.ll
index 0d0b4d274080cb..6068b5127d558d 100644
--- a/llvm/test/CodeGen/XCore/bitrev.ll
+++ b/llvm/test/CodeGen/XCore/bitrev.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
declare i8 @llvm.bitreverse.i8(i8)
declare i16 @llvm.bitreverse.i16(i16)
diff --git a/llvm/test/CodeGen/XCore/byVal.ll b/llvm/test/CodeGen/XCore/byVal.ll
index f0bf78bd4027a1..901340773fc11e 100644
--- a/llvm/test/CodeGen/XCore/byVal.ll
+++ b/llvm/test/CodeGen/XCore/byVal.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; CHECK-LABEL: f0Test
; CHECK: entsp 1
diff --git a/llvm/test/CodeGen/XCore/call.ll b/llvm/test/CodeGen/XCore/call.ll
index 6bf763b53ca1fe..0dbec44264cc70 100644
--- a/llvm/test/CodeGen/XCore/call.ll
+++ b/llvm/test/CodeGen/XCore/call.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; CHECK-LABEL: bl_imm:
; CHECK: ldw [[R0:r[0-9]+]], cp
diff --git a/llvm/test/CodeGen/XCore/constants.ll b/llvm/test/CodeGen/XCore/constants.ll
index c289bf94ce30d1..a8ee06f1d51535 100644
--- a/llvm/test/CodeGen/XCore/constants.ll
+++ b/llvm/test/CodeGen/XCore/constants.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -mcpu=xs1b-generic | FileCheck %s
; CHECK: .section .cp.rodata.cst4,"aMc", at progbits,4
; CHECK: .LCPI0_0:
diff --git a/llvm/test/CodeGen/XCore/events.ll b/llvm/test/CodeGen/XCore/events.ll
index 97491b798e8357..8810dd180cb67a 100644
--- a/llvm/test/CodeGen/XCore/events.ll
+++ b/llvm/test/CodeGen/XCore/events.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
declare void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr %p)
declare ptr @llvm.xcore.waitevent()
diff --git a/llvm/test/CodeGen/XCore/exception.ll b/llvm/test/CodeGen/XCore/exception.ll
index 725c17eca6a9da..f222297f452cd8 100644
--- a/llvm/test/CodeGen/XCore/exception.ll
+++ b/llvm/test/CodeGen/XCore/exception.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
declare void @g()
declare i32 @__gxx_personality_v0(...)
diff --git a/llvm/test/CodeGen/XCore/fneg.ll b/llvm/test/CodeGen/XCore/fneg.ll
index 20433da3bbe50f..313cbd17551dc1 100644
--- a/llvm/test/CodeGen/XCore/fneg.ll
+++ b/llvm/test/CodeGen/XCore/fneg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define i1 @test(double %F, double %G) nounwind {
entry:
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/XCore/getid.ll b/llvm/test/CodeGen/XCore/getid.ll
index da80e10a0a6696..b2d101d5deb460 100644
--- a/llvm/test/CodeGen/XCore/getid.ll
+++ b/llvm/test/CodeGen/XCore/getid.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
declare i32 @llvm.xcore.getid()
define i32 @test() {
diff --git a/llvm/test/CodeGen/XCore/globals.ll b/llvm/test/CodeGen/XCore/globals.ll
index d3b64d2640002c..134bbb3444b5d5 100644
--- a/llvm/test/CodeGen/XCore/globals.ll
+++ b/llvm/test/CodeGen/XCore/globals.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
-; RUN: llc -march=xcore -mcpu=xs1b-generic -filetype=null %s
+; RUN: llc < %s -mtriple=xcore -mcpu=xs1b-generic | FileCheck %s
+; RUN: llc -mtriple=xcore -mcpu=xs1b-generic -filetype=null %s
define ptr @addr_G1() {
entry:
diff --git a/llvm/test/CodeGen/XCore/indirectbr.ll b/llvm/test/CodeGen/XCore/indirectbr.ll
index a5280cac3ca5d2..4ed4c3a2e95d6a 100644
--- a/llvm/test/CodeGen/XCore/indirectbr.ll
+++ b/llvm/test/CodeGen/XCore/indirectbr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
@nextaddr = global ptr null ; <ptr> [#uses=2]
@C.0.2070 = private constant [5 x ptr] [ptr blockaddress(@foo, %L1), ptr blockaddress(@foo, %L2), ptr blockaddress(@foo, %L3), ptr blockaddress(@foo, %L4), ptr blockaddress(@foo, %L5)] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/XCore/inline-asm.ll b/llvm/test/CodeGen/XCore/inline-asm.ll
index 76adcadf271d02..6e980dc9605df9 100644
--- a/llvm/test/CodeGen/XCore/inline-asm.ll
+++ b/llvm/test/CodeGen/XCore/inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; CHECK-LABEL: f1:
; CHECK: foo r0
define i32 @f1() nounwind {
diff --git a/llvm/test/CodeGen/XCore/inlineasm-output-template.ll b/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
index 12960c5b20df3a..13b869bfd987df 100644
--- a/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
+++ b/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
; Test that %c works with immediates
; CHECK-LABEL: test_inlineasm_c_output_template0
diff --git a/llvm/test/CodeGen/XCore/ladd_lsub_combine.ll b/llvm/test/CodeGen/XCore/ladd_lsub_combine.ll
index b75e30db863d49..a461d24121a19d 100644
--- a/llvm/test/CodeGen/XCore/ladd_lsub_combine.ll
+++ b/llvm/test/CodeGen/XCore/ladd_lsub_combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
; Only needs one ladd
define i64 @f1(i32 %x, i32 %y) nounwind {
diff --git a/llvm/test/CodeGen/XCore/licm-ldwcp.ll b/llvm/test/CodeGen/XCore/licm-ldwcp.ll
index 9ba5c46d7c13fc..a3e28ab2d437f6 100644
--- a/llvm/test/CodeGen/XCore/licm-ldwcp.ll
+++ b/llvm/test/CodeGen/XCore/licm-ldwcp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -asm-verbose=0 | FileCheck %s
; MachineLICM should hoist the LDWCP out of the loop.
diff --git a/llvm/test/CodeGen/XCore/linkage.ll b/llvm/test/CodeGen/XCore/linkage.ll
index c2000229be295f..93edf01cf8a962 100644
--- a/llvm/test/CodeGen/XCore/linkage.ll
+++ b/llvm/test/CodeGen/XCore/linkage.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; CHECK: .weak fd
define weak void @fd() {
diff --git a/llvm/test/CodeGen/XCore/llvm-intrinsics.ll b/llvm/test/CodeGen/XCore/llvm-intrinsics.ll
index feb33988d49aa3..3421484f742df3 100644
--- a/llvm/test/CodeGen/XCore/llvm-intrinsics.ll
+++ b/llvm/test/CodeGen/XCore/llvm-intrinsics.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; RUN: llc < %s -march=xcore -frame-pointer=all | FileCheck %s -check-prefix=CHECKFP
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -frame-pointer=all | FileCheck %s -check-prefix=CHECKFP
declare ptr @llvm.frameaddress(i32) nounwind readnone
declare ptr @llvm.returnaddress(i32) nounwind
diff --git a/llvm/test/CodeGen/XCore/load.ll b/llvm/test/CodeGen/XCore/load.ll
index 7b6993de82cd16..54782916ba5a5f 100644
--- a/llvm/test/CodeGen/XCore/load.ll
+++ b/llvm/test/CodeGen/XCore/load.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define i32 @load32(ptr %p, i32 %offset) nounwind {
entry:
diff --git a/llvm/test/CodeGen/XCore/memcpy.ll b/llvm/test/CodeGen/XCore/memcpy.ll
index 404c7c513015a3..3a2352c8048891 100644
--- a/llvm/test/CodeGen/XCore/memcpy.ll
+++ b/llvm/test/CodeGen/XCore/memcpy.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; Optimize memcpy to __memcpy_4 if src, dst and size are all 4 byte aligned.
define void @f1(ptr %dst, ptr %src, i32 %n) nounwind {
diff --git a/llvm/test/CodeGen/XCore/misc-intrinsics.ll b/llvm/test/CodeGen/XCore/misc-intrinsics.ll
index 30d7493eb503b5..a7185b2d48cfe2 100644
--- a/llvm/test/CodeGen/XCore/misc-intrinsics.ll
+++ b/llvm/test/CodeGen/XCore/misc-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
%0 = type { i32, i32 }
declare i32 @llvm.xcore.bitrev(i32)
diff --git a/llvm/test/CodeGen/XCore/mkmsk.ll b/llvm/test/CodeGen/XCore/mkmsk.ll
index bcec32d7552253..33c959d86a15b1 100644
--- a/llvm/test/CodeGen/XCore/mkmsk.ll
+++ b/llvm/test/CodeGen/XCore/mkmsk.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define i32 @f(i32) nounwind {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/XCore/mul64.ll b/llvm/test/CodeGen/XCore/mul64.ll
index cfc98553d58b1e..8ecf12a46fa61a 100644
--- a/llvm/test/CodeGen/XCore/mul64.ll
+++ b/llvm/test/CodeGen/XCore/mul64.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-; RUN: llc < %s -march=xcore -regalloc=basic | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -regalloc=basic | FileCheck %s
define i64 @umul_lohi(i32 %a, i32 %b) {
entry:
%0 = zext i32 %a to i64
diff --git a/llvm/test/CodeGen/XCore/offset_folding.ll b/llvm/test/CodeGen/XCore/offset_folding.ll
index 806772ded1aa18..89648b18a2c5e4 100644
--- a/llvm/test/CodeGen/XCore/offset_folding.ll
+++ b/llvm/test/CodeGen/XCore/offset_folding.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
@a = external dso_local constant [0 x i32], section ".cp.rodata"
@b = external dso_local global [0 x i32]
diff --git a/llvm/test/CodeGen/XCore/private.ll b/llvm/test/CodeGen/XCore/private.ll
index 2880c09cb90777..a44f516cfb8881 100644
--- a/llvm/test/CodeGen/XCore/private.ll
+++ b/llvm/test/CodeGen/XCore/private.ll
@@ -1,6 +1,6 @@
; Test to make sure that the 'private' is used correctly.
;
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define private void @foo() {
; CHECK: .Lfoo:
diff --git a/llvm/test/CodeGen/XCore/ps-intrinsics.ll b/llvm/test/CodeGen/XCore/ps-intrinsics.ll
index 02609ed8d678f3..7654220107e2fe 100644
--- a/llvm/test/CodeGen/XCore/ps-intrinsics.ll
+++ b/llvm/test/CodeGen/XCore/ps-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
declare i32 @llvm.xcore.getps(i32)
declare void @llvm.xcore.setps(i32, i32)
diff --git a/llvm/test/CodeGen/XCore/resources.ll b/llvm/test/CodeGen/XCore/resources.ll
index 42129cdd272739..eb0feb9c70009a 100644
--- a/llvm/test/CodeGen/XCore/resources.ll
+++ b/llvm/test/CodeGen/XCore/resources.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
declare ptr addrspace(1) @llvm.xcore.getr.p1(i32 %type)
declare void @llvm.xcore.freer.p1(ptr addrspace(1) %r)
diff --git a/llvm/test/CodeGen/XCore/resources_combine.ll b/llvm/test/CodeGen/XCore/resources_combine.ll
index e130c8ce969fa9..6674f8e0a32dbf 100644
--- a/llvm/test/CodeGen/XCore/resources_combine.ll
+++ b/llvm/test/CodeGen/XCore/resources_combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
declare i32 @llvm.xcore.int.p1(ptr addrspace(1) %r)
declare i32 @llvm.xcore.inct.p1(ptr addrspace(1) %r)
diff --git a/llvm/test/CodeGen/XCore/section-name.ll b/llvm/test/CodeGen/XCore/section-name.ll
index 548ddab8a3cf52..0fa2cc606a5e06 100644
--- a/llvm/test/CodeGen/XCore/section-name.ll
+++ b/llvm/test/CodeGen/XCore/section-name.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=xcore -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llc < %s -mtriple=xcore -o /dev/null 2>&1 | FileCheck %s
@bar = internal global i32 zeroinitializer
diff --git a/llvm/test/CodeGen/XCore/sext.ll b/llvm/test/CodeGen/XCore/sext.ll
index b3e66ec094262b..360600cf8c7401 100644
--- a/llvm/test/CodeGen/XCore/sext.ll
+++ b/llvm/test/CodeGen/XCore/sext.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define i32 @sext1(i32 %a) {
%1 = trunc i32 %a to i1
%2 = sext i1 %1 to i32
diff --git a/llvm/test/CodeGen/XCore/shedulingPreference.ll b/llvm/test/CodeGen/XCore/shedulingPreference.ll
index 6c2ac6dce487e5..f9fc9ab2175d00 100644
--- a/llvm/test/CodeGen/XCore/shedulingPreference.ll
+++ b/llvm/test/CodeGen/XCore/shedulingPreference.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore
+; RUN: llc < %s -mtriple=xcore
define void @f( ) {
entry:
diff --git a/llvm/test/CodeGen/XCore/sr-intrinsics.ll b/llvm/test/CodeGen/XCore/sr-intrinsics.ll
index 2c4175d94a9c35..5ede8b7754c1a8 100644
--- a/llvm/test/CodeGen/XCore/sr-intrinsics.ll
+++ b/llvm/test/CodeGen/XCore/sr-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
declare void @llvm.xcore.setsr(i32)
declare void @llvm.xcore.clrsr(i32)
diff --git a/llvm/test/CodeGen/XCore/store.ll b/llvm/test/CodeGen/XCore/store.ll
index c09edb96980ea5..c1000981f0e6cc 100644
--- a/llvm/test/CodeGen/XCore/store.ll
+++ b/llvm/test/CodeGen/XCore/store.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define void @store32(ptr %p, i32 %offset, i32 %val) nounwind {
entry:
diff --git a/llvm/test/CodeGen/XCore/switch.ll b/llvm/test/CodeGen/XCore/switch.ll
index 9cc27f2ffaa44c..7d50c3a1de9a6e 100644
--- a/llvm/test/CodeGen/XCore/switch.ll
+++ b/llvm/test/CodeGen/XCore/switch.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
define i32 @switch(i32 %i) {
entry:
diff --git a/llvm/test/CodeGen/XCore/switch_long.ll b/llvm/test/CodeGen/XCore/switch_long.ll
index 30c9e3db739774..ac50d000933eac 100644
--- a/llvm/test/CodeGen/XCore/switch_long.ll
+++ b/llvm/test/CodeGen/XCore/switch_long.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
define i32 @switch(i32 %i) {
entry:
diff --git a/llvm/test/CodeGen/XCore/tls.ll b/llvm/test/CodeGen/XCore/tls.ll
index f71f36565d2bc3..710567ed209335 100644
--- a/llvm/test/CodeGen/XCore/tls.ll
+++ b/llvm/test/CodeGen/XCore/tls.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
+; RUN: llc < %s -mtriple=xcore -mcpu=xs1b-generic | FileCheck %s
define ptr @addr_G() {
entry:
diff --git a/llvm/test/CodeGen/XCore/trampoline.ll b/llvm/test/CodeGen/XCore/trampoline.ll
index 15234e5318664d..c43e0c3f5b0936 100644
--- a/llvm/test/CodeGen/XCore/trampoline.ll
+++ b/llvm/test/CodeGen/XCore/trampoline.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
%struct.FRAME.f = type { i32, ptr }
diff --git a/llvm/test/CodeGen/XCore/trap.ll b/llvm/test/CodeGen/XCore/trap.ll
index ef0dfd63400976..b81de264cfe6ad 100644
--- a/llvm/test/CodeGen/XCore/trap.ll
+++ b/llvm/test/CodeGen/XCore/trap.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define i32 @test() noreturn nounwind {
entry:
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/XCore/unaligned_load.ll b/llvm/test/CodeGen/XCore/unaligned_load.ll
index 2bf158aade316a..ee9aea46895030 100644
--- a/llvm/test/CodeGen/XCore/unaligned_load.ll
+++ b/llvm/test/CodeGen/XCore/unaligned_load.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; Byte aligned load.
; CHECK: align1
diff --git a/llvm/test/CodeGen/XCore/unaligned_store.ll b/llvm/test/CodeGen/XCore/unaligned_store.ll
index 731e4628d916b0..e0eb4392e66719 100644
--- a/llvm/test/CodeGen/XCore/unaligned_store.ll
+++ b/llvm/test/CodeGen/XCore/unaligned_store.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; Byte aligned store.
; CHECK-LABEL: align1:
diff --git a/llvm/test/CodeGen/XCore/unaligned_store_combine.ll b/llvm/test/CodeGen/XCore/unaligned_store_combine.ll
index 97b08d7cb69b12..5cbb8047b0ceda 100644
--- a/llvm/test/CodeGen/XCore/unaligned_store_combine.ll
+++ b/llvm/test/CodeGen/XCore/unaligned_store_combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
; Unaligned load / store pair. Should be combined into a memmove
; of size 8
diff --git a/llvm/test/CodeGen/XCore/varargs.ll b/llvm/test/CodeGen/XCore/varargs.ll
index f24428a670a2fb..46d0b97cf0db0b 100644
--- a/llvm/test/CodeGen/XCore/varargs.ll
+++ b/llvm/test/CodeGen/XCore/varargs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -mtriple=xcore | FileCheck %s
define void @_Z1fz(...) {
entry:
diff --git a/llvm/test/CodeGen/XCore/zext.ll b/llvm/test/CodeGen/XCore/zext.ll
index 32abfcaed10b61..82ef9aeffd50ab 100644
--- a/llvm/test/CodeGen/XCore/zext.ll
+++ b/llvm/test/CodeGen/XCore/zext.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
define i32 @f(i1 %a) {
entry:
diff --git a/llvm/test/CodeGen/XCore/zextfree.ll b/llvm/test/CodeGen/XCore/zextfree.ll
index d0b07f20be9cf3..3b4d4ef6fef554 100644
--- a/llvm/test/CodeGen/XCore/zextfree.ll
+++ b/llvm/test/CodeGen/XCore/zextfree.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=xcore < %s | FileCheck %s
+; RUN: llc -mtriple=xcore < %s | FileCheck %s
; CHECK-LABEL: test:
; CHECK-NOT: zext
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