[llvm] [X86][Codegen] Shuffle certain shifts on i8 vectors to create opportunity for vectorized shift instructions (PR #117980)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 15 08:40:34 PST 2024


RKSimon wrote:

> > Depending on your target CPU I did start work on generic vXi8 shift lowering using GFNI instructions: #89644 which I haven't had time to go back to, have you looked at anything similar?
> 
> Won't affect GFNI, as my patch does not apply on AVX512, and all GFNI CPU has AVX512

GFNI isn't AVX512 only - everything since Alderlake (P + E cores) has it, as well a some recent Atom cores (Tremont onwards).

https://github.com/llvm/llvm-project/pull/117980


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