[llvm] [AArch64][GlobalISel] Scalarize i128 shufflevector instructions. (PR #119980)

[Amara Emerson via llvm-commits]

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@@ -5535,7 +5535,10 @@ LegalizerHelper::LegalizeResult LegalizerHelper::fewerElementsVectorShuffle(
     Ops.clear();
   }
 
-  MIRBuilder.buildConcatVectors(DstReg, {Lo, Hi});
+  if (NarrowTy.isVector())
+    MIRBuilder.buildConcatVectors(DstReg, {Lo, Hi});
+  else
+    MIRBuilder.buildBuildVector(DstReg, {Lo, Hi});
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aemerson wrote:

I think you can just use `buildMergeLikeInstr()` for both cases.

https://github.com/llvm/llvm-project/pull/119980