[llvm] Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (PR #119592)

Aidan Goldfarb via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 14 10:31:13 PST 2024


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@@ -790,6 +818,17 @@ inline BinaryOpc_match<LHS, RHS> m_FRem(const LHS &L, const RHS &R) {
   return BinaryOpc_match<LHS, RHS>(ISD::FREM, L, R);
 }
 
+template <typename LHS, typename RHS>
+inline BinaryOpc_match<LHS, RHS> m_Shuffle(const LHS &v1, const RHS &v2) {
+  return BinaryOpc_match<LHS, RHS>(ISD::VECTOR_SHUFFLE, v1, v2);
+}
+
+template <typename V1_t, typename V2_t>
+inline SDShuffle_match<V1_t, V2_t> m_Shuffle(const V1_t &v1, const V2_t &v2,
+                                             const ArrayRef<int> mask) {
----------------
AidanGoldfarb wrote:

I kept `const` for both, my understanding is that since no mutation is occurring this will improve readability? Admittedly I do not have much justification beyond that, however I am very open to learning more about when/why `const` should be used

https://github.com/llvm/llvm-project/pull/119592


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