[llvm] 0199486 - [LoongArch][NFC] Pre-commit tests for sign-extension removal with vectors
WANG Rui via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 13 07:08:55 PST 2024
Author: WANG Rui
Date: 2024-12-13T23:09:23+08:00
New Revision: 019948647ebdb9f4d5cfce5a8f4afe9d4eafb14e
URL: https://github.com/llvm/llvm-project/commit/019948647ebdb9f4d5cfce5a8f4afe9d4eafb14e
DIFF: https://github.com/llvm/llvm-project/commit/019948647ebdb9f4d5cfce5a8f4afe9d4eafb14e.diff
LOG: [LoongArch][NFC] Pre-commit tests for sign-extension removal with vectors
Added:
Modified:
llvm/test/CodeGen/LoongArch/sextw-removal.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/LoongArch/sextw-removal.ll b/llvm/test/CodeGen/LoongArch/sextw-removal.ll
index 0aeafadb9325b8..684ac1d3558683 100644
--- a/llvm/test/CodeGen/LoongArch/sextw-removal.ll
+++ b/llvm/test/CodeGen/LoongArch/sextw-removal.ll
@@ -1334,3 +1334,201 @@ entry:
%a = call i32 @llvm.loongarch.lsx.vpickve2gr.w(<4 x i32> %v, i32 3)
ret i32 %a
}
+
+define fastcc ptr @test21(ptr %B, ptr %Op0, ptr %Op1, ptr %P, ptr %M, i1 zeroext %I, i64 %0, ptr %a.1, i64 %1, i1 %c, i32 %2) {
+; CHECK-LABEL: test21:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: addi.d $sp, $sp, -80
+; CHECK-NEXT: .cfi_def_cfa_offset 80
+; CHECK-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $fp, $sp, 64 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s0, $sp, 56 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s1, $sp, 48 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s2, $sp, 40 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s3, $sp, 32 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s4, $sp, 24 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s5, $sp, 16 # 8-byte Folded Spill
+; CHECK-NEXT: st.d $s6, $sp, 8 # 8-byte Folded Spill
+; CHECK-NEXT: .cfi_offset 1, -8
+; CHECK-NEXT: .cfi_offset 22, -16
+; CHECK-NEXT: .cfi_offset 23, -24
+; CHECK-NEXT: .cfi_offset 24, -32
+; CHECK-NEXT: .cfi_offset 25, -40
+; CHECK-NEXT: .cfi_offset 26, -48
+; CHECK-NEXT: .cfi_offset 27, -56
+; CHECK-NEXT: .cfi_offset 28, -64
+; CHECK-NEXT: .cfi_offset 29, -72
+; CHECK-NEXT: ld.d $s6, $sp, 80
+; CHECK-NEXT: move $s2, $a7
+; CHECK-NEXT: move $s4, $a5
+; CHECK-NEXT: move $s0, $a4
+; CHECK-NEXT: move $fp, $a3
+; CHECK-NEXT: move $s5, $a2
+; CHECK-NEXT: move $s3, $a1
+; CHECK-NEXT: move $s1, $a0
+; CHECK-NEXT: move $a0, $zero
+; CHECK-NEXT: jirl $ra, $zero, 0
+; CHECK-NEXT: beqz $s4, .LBB24_2
+; CHECK-NEXT: # %bb.1: # %if.then26
+; CHECK-NEXT: addi.w $s6, $s6, 1
+; CHECK-NEXT: beqz $s4, .LBB24_3
+; CHECK-NEXT: b .LBB24_6
+; CHECK-NEXT: .LBB24_2:
+; CHECK-NEXT: move $s3, $s5
+; CHECK-NEXT: bnez $s4, .LBB24_6
+; CHECK-NEXT: .LBB24_3: # %for.cond32.preheader.preheader
+; CHECK-NEXT: ld.d $a0, $sp, 96
+; CHECK-NEXT: ld.d $a1, $sp, 88
+; CHECK-NEXT: addi.w $a2, $s6, 0
+; CHECK-NEXT: sltui $a2, $a2, 1
+; CHECK-NEXT: masknez $a0, $a0, $a2
+; CHECK-NEXT: vreplgr2vr.w $vr0, $s6
+; CHECK-NEXT: andi $a1, $a1, 1
+; CHECK-NEXT: .p2align 4, , 16
+; CHECK-NEXT: .LBB24_4: # %for.cond32.preheader
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: st.w $a0, $zero, 0
+; CHECK-NEXT: vst $vr0, $s2, 0
+; CHECK-NEXT: bnez $a1, .LBB24_4
+; CHECK-NEXT: # %bb.5: # %for.cond.cleanup
+; CHECK-NEXT: move $a0, $zero
+; CHECK-NEXT: move $a1, $s3
+; CHECK-NEXT: move $a2, $zero
+; CHECK-NEXT: move $a3, $zero
+; CHECK-NEXT: move $a4, $zero
+; CHECK-NEXT: move $a5, $zero
+; CHECK-NEXT: jirl $ra, $zero, 0
+; CHECK-NEXT: move $a0, $s1
+; CHECK-NEXT: move $a1, $s0
+; CHECK-NEXT: move $a2, $zero
+; CHECK-NEXT: move $a3, $fp
+; CHECK-NEXT: jirl $ra, $zero, 0
+; CHECK-NEXT: .LBB24_6: # %for.cond32.preheader.us.preheader
+; CHECK-NEXT: move $a0, $zero
+; CHECK-NEXT: ld.d $s6, $sp, 8 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $s5, $sp, 16 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $s4, $sp, 24 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $s3, $sp, 32 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $s2, $sp, 40 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $s1, $sp, 48 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $s0, $sp, 56 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $fp, $sp, 64 # 8-byte Folded Reload
+; CHECK-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 80
+; CHECK-NEXT: ret
+;
+; NORMV-LABEL: test21:
+; NORMV: # %bb.0: # %entry
+; NORMV-NEXT: addi.d $sp, $sp, -80
+; NORMV-NEXT: .cfi_def_cfa_offset 80
+; NORMV-NEXT: st.d $ra, $sp, 72 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $fp, $sp, 64 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $s0, $sp, 56 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $s1, $sp, 48 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $s2, $sp, 40 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $s3, $sp, 32 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $s4, $sp, 24 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $s5, $sp, 16 # 8-byte Folded Spill
+; NORMV-NEXT: st.d $s6, $sp, 8 # 8-byte Folded Spill
+; NORMV-NEXT: .cfi_offset 1, -8
+; NORMV-NEXT: .cfi_offset 22, -16
+; NORMV-NEXT: .cfi_offset 23, -24
+; NORMV-NEXT: .cfi_offset 24, -32
+; NORMV-NEXT: .cfi_offset 25, -40
+; NORMV-NEXT: .cfi_offset 26, -48
+; NORMV-NEXT: .cfi_offset 27, -56
+; NORMV-NEXT: .cfi_offset 28, -64
+; NORMV-NEXT: .cfi_offset 29, -72
+; NORMV-NEXT: ld.d $s6, $sp, 80
+; NORMV-NEXT: move $s2, $a7
+; NORMV-NEXT: move $s4, $a5
+; NORMV-NEXT: move $s0, $a4
+; NORMV-NEXT: move $fp, $a3
+; NORMV-NEXT: move $s5, $a2
+; NORMV-NEXT: move $s3, $a1
+; NORMV-NEXT: move $s1, $a0
+; NORMV-NEXT: move $a0, $zero
+; NORMV-NEXT: jirl $ra, $zero, 0
+; NORMV-NEXT: beqz $s4, .LBB24_2
+; NORMV-NEXT: # %bb.1: # %if.then26
+; NORMV-NEXT: addi.d $a0, $s6, 1
+; NORMV-NEXT: addi.w $s6, $a0, 0
+; NORMV-NEXT: beqz $s4, .LBB24_3
+; NORMV-NEXT: b .LBB24_6
+; NORMV-NEXT: .LBB24_2:
+; NORMV-NEXT: move $s3, $s5
+; NORMV-NEXT: bnez $s4, .LBB24_6
+; NORMV-NEXT: .LBB24_3: # %for.cond32.preheader.preheader
+; NORMV-NEXT: ld.d $a0, $sp, 96
+; NORMV-NEXT: ld.d $a1, $sp, 88
+; NORMV-NEXT: addi.w $a2, $s6, 0
+; NORMV-NEXT: sltui $a2, $a2, 1
+; NORMV-NEXT: masknez $a0, $a0, $a2
+; NORMV-NEXT: vreplgr2vr.w $vr0, $s6
+; NORMV-NEXT: andi $a1, $a1, 1
+; NORMV-NEXT: .p2align 4, , 16
+; NORMV-NEXT: .LBB24_4: # %for.cond32.preheader
+; NORMV-NEXT: # =>This Inner Loop Header: Depth=1
+; NORMV-NEXT: st.w $a0, $zero, 0
+; NORMV-NEXT: vst $vr0, $s2, 0
+; NORMV-NEXT: bnez $a1, .LBB24_4
+; NORMV-NEXT: # %bb.5: # %for.cond.cleanup
+; NORMV-NEXT: move $a0, $zero
+; NORMV-NEXT: move $a1, $s3
+; NORMV-NEXT: move $a2, $zero
+; NORMV-NEXT: move $a3, $zero
+; NORMV-NEXT: move $a4, $zero
+; NORMV-NEXT: move $a5, $zero
+; NORMV-NEXT: jirl $ra, $zero, 0
+; NORMV-NEXT: move $a0, $s1
+; NORMV-NEXT: move $a1, $s0
+; NORMV-NEXT: move $a2, $zero
+; NORMV-NEXT: move $a3, $fp
+; NORMV-NEXT: jirl $ra, $zero, 0
+; NORMV-NEXT: .LBB24_6: # %for.cond32.preheader.us.preheader
+; NORMV-NEXT: move $a0, $zero
+; NORMV-NEXT: ld.d $s6, $sp, 8 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $s5, $sp, 16 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $s4, $sp, 24 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $s3, $sp, 32 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $s2, $sp, 40 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $s1, $sp, 48 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $s0, $sp, 56 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $fp, $sp, 64 # 8-byte Folded Reload
+; NORMV-NEXT: ld.d $ra, $sp, 72 # 8-byte Folded Reload
+; NORMV-NEXT: addi.d $sp, $sp, 80
+; NORMV-NEXT: ret
+entry:
+ %call4.i.i.i.i = tail call i32 null(ptr null)
+ %conv = trunc i64 %1 to i32
+ br i1 %I, label %if.then26, label %if.end30
+
+if.then26: ; preds = %entry
+ %sub27 = add i32 %conv, 1
+ br label %if.end30
+
+if.end30: ; preds = %if.then26, %entry
+ %Op1.addr.0 = phi ptr [ %Op0, %if.then26 ], [ %Op1, %entry ]
+ %ShiftVal.1 = phi i32 [ %sub27, %if.then26 ], [ %conv, %entry ]
+ br i1 %I, label %for.cond32.preheader.us.preheader, label %for.cond32.preheader.preheader
+
+for.cond32.preheader.preheader: ; preds = %if.end30
+ %cmp37 = icmp ult i32 %ShiftVal.1, 1
+ %spec.select = select i1 %cmp37, i32 0, i32 %2
+ br label %for.cond32.preheader
+
+for.cond32.preheader.us.preheader: ; preds = %if.end30
+ ret ptr null
+
+for.cond32.preheader: ; preds = %for.cond32.preheader, %for.cond32.preheader.preheader
+ store i32 %spec.select, ptr null, align 4
+ %3 = insertelement <4 x i32> zeroinitializer, i32 %ShiftVal.1, i64 0
+ %4 = shufflevector <4 x i32> %3, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer
+ store <4 x i32> %4, ptr %a.1, align 4
+ br i1 %c, label %for.cond32.preheader, label %for.cond.cleanup
+
+for.cond.cleanup: ; preds = %for.cond32.preheader
+ %call48 = call ptr null(ptr null, ptr %Op1.addr.0, ptr null, [2 x i64] zeroinitializer, ptr null)
+ %call49 = call fastcc ptr null(ptr %B, ptr %M, ptr null, ptr %P)
+ ret ptr null
+}
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