[llvm] [AArch64][SVE] Don't require 16-byte aligned SVE loads/stores with +strict-align (PR #119732)

Sander de Smalen via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 13 07:06:42 PST 2024

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https://github.com/sdesmalen-arm approved this pull request.


https://github.com/llvm/llvm-project/pull/119732

Previous message: [llvm] [AArch64][SVE] Don't require 16-byte aligned SVE loads/stores with +strict-align (PR #119732)
Next message: [llvm] [RISCV][VLOPT] Add vector integer cmp instructions to isSupportedInstr and getOperandInfo (PR #119733)
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