[llvm] [SPIR-V] Add saturation and float rounding mode decorations, several arithmetic constrained floating-point intrinsics, and SPV_INTEL_float_controls2 extension (PR #119862)

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git-clang-format --diff 42633cf27bd2cfb44e9f332c33cfd6750b9d7be4 10ab51c5d66d345f0d399fec950c122f6b87bc27 --extensions h,cpp -- llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp llvm/lib/Target/SPIRV/SPIRVBuiltins.h llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
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diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
index 2950bc8607..833e8a107c 100644
--- a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
@@ -25,34 +25,20 @@ using namespace llvm::LegalizeActions;
 using namespace llvm::LegalityPredicates;
 
 static const std::set<unsigned> TypeFoldingSupportingOpcs = {
-    TargetOpcode::G_ADD,
-    TargetOpcode::G_FADD,
-    TargetOpcode::G_STRICT_FADD,
-    TargetOpcode::G_SUB,
-    TargetOpcode::G_FSUB,
-    TargetOpcode::G_STRICT_FSUB,
-    TargetOpcode::G_MUL,
-    TargetOpcode::G_FMUL,
-    TargetOpcode::G_STRICT_FMUL,
-    TargetOpcode::G_SDIV,
-    TargetOpcode::G_UDIV,
-    TargetOpcode::G_FDIV,
-    TargetOpcode::G_STRICT_FDIV,
-    TargetOpcode::G_SREM,
-    TargetOpcode::G_UREM,
-    TargetOpcode::G_FREM,
-    TargetOpcode::G_STRICT_FREM,
-    TargetOpcode::G_FNEG,
-    TargetOpcode::G_CONSTANT,
-    TargetOpcode::G_FCONSTANT,
-    TargetOpcode::G_AND,
-    TargetOpcode::G_OR,
-    TargetOpcode::G_XOR,
-    TargetOpcode::G_SHL,
-    TargetOpcode::G_ASHR,
-    TargetOpcode::G_LSHR,
-    TargetOpcode::G_SELECT,
-    TargetOpcode::G_EXTRACT_VECTOR_ELT,
+    TargetOpcode::G_ADD,         TargetOpcode::G_FADD,
+    TargetOpcode::G_STRICT_FADD, TargetOpcode::G_SUB,
+    TargetOpcode::G_FSUB,        TargetOpcode::G_STRICT_FSUB,
+    TargetOpcode::G_MUL,         TargetOpcode::G_FMUL,
+    TargetOpcode::G_STRICT_FMUL, TargetOpcode::G_SDIV,
+    TargetOpcode::G_UDIV,        TargetOpcode::G_FDIV,
+    TargetOpcode::G_STRICT_FDIV, TargetOpcode::G_SREM,
+    TargetOpcode::G_UREM,        TargetOpcode::G_FREM,
+    TargetOpcode::G_STRICT_FREM, TargetOpcode::G_FNEG,
+    TargetOpcode::G_CONSTANT,    TargetOpcode::G_FCONSTANT,
+    TargetOpcode::G_AND,         TargetOpcode::G_OR,
+    TargetOpcode::G_XOR,         TargetOpcode::G_SHL,
+    TargetOpcode::G_ASHR,        TargetOpcode::G_LSHR,
+    TargetOpcode::G_SELECT,      TargetOpcode::G_EXTRACT_VECTOR_ELT,
 };
 
 bool isTypeFoldingSupported(unsigned Opcode) {

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https://github.com/llvm/llvm-project/pull/119862