[llvm] [NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (PR #119622)

Drew Kersnar via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 12 14:42:12 PST 2024


================
@@ -4,7 +4,7 @@
 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_70 -mattr=+ptx82 | FileCheck %s -check-prefixes=CHECK,SM70
 ; RUN: %if ptxas-12.2 %{ llc < %s -march=nvptx64 -mcpu=sm_70 -mattr=+ptx82 | %ptxas-verify -arch=sm_70 %}
 
-; TODO: add i1, <8 x i8>, and <6 x i8> vector tests.
+; TODO: add i1, and <6 x i8> vector tests.
----------------
dakersnar wrote:

Done. I tried to keep only the relevant TODOs at the top of each new file, can you double check my work there?

https://github.com/llvm/llvm-project/pull/119622


More information about the llvm-commits mailing list