[llvm] [AArch64][SVE] Don't require 16-byte aligned SVE loads/stores with +strict-align (PR #119732)

via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 12 10:13:31 PST 2024


github-actions[bot] wrote:

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git-clang-format --diff 3dbff90b16b5964b9fa468438ff40985be5c1ade 5162394a60f0eb7fc9707acc87c505691926e462 --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index ee882dbae0..51c8ff6050 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2577,7 +2577,7 @@ bool AArch64TargetLowering::allowsMisalignedMemoryAccesses(
   // which is unnecessary and fails to build as TLI.expandUnalignedLoad() and
   // TLI.expandUnalignedStore() don't yet support scalable vectors.
   if (VT.isScalableVector() && Alignment >= Align(VT.getScalarSizeInBits() / 8))
-      return true;
+    return true;
 
   if (Subtarget->requiresStrictAlign())
     return false;

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https://github.com/llvm/llvm-project/pull/119732


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