[llvm] [RISCV][VLOPT] Add support for mask-register logical instructions and set mask instructions (PR #112231)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 11 13:49:13 PST 2024
================
@@ -560,4 +560,54 @@ body: |
%z:gpr = ADDI $x0, 2
PseudoVSSE8_V_MF2 %x, %y, %z, 1, 3 /* e8 */
...
+---
+name: vmop_mm
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmop_mm
+ ; CHECK: %x:vr = PseudoVMAND_MM_M1 $noreg, $noreg, 1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVMAND_MM_M1 $noreg, %x, 1, 0 /* e8 */
+ %x:vr = PseudoVMAND_MM_M1 $noreg, $noreg, -1, 0
+ %y:vr = PseudoVMAND_MM_M1 $noreg, %x, 1, 0
+...
+---
+name: vmop_mm_incompatible_eew
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmop_mm_incompatible_eew
+ ; CHECK: %x:vr = PseudoVMAND_MM_M1 $noreg, $noreg, -1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVADD_VV_M1 $noreg, $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */
+ %x:vr = PseudoVMAND_MM_M1 $noreg, $noreg, -1, 0
+ %y:vr = PseudoVADD_VV_M1 $noreg, $noreg, %x, 1, 3 /* e8 */, 0
+...
+---
+name: vmop_mm_incompatible_emul
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmop_mm_incompatible_emul
+ ; CHECK: %x:vr = PseudoVMAND_MM_M1 $noreg, $noreg, -1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vr = PseudoVMAND_MM_MF2 $noreg, %x, 1, 0 /* e8 */
+ %x:vr = PseudoVMAND_MM_M1 $noreg, $noreg, -1, 0
+ %y:vr = PseudoVMAND_MM_MF2 $noreg, %x, 1, 0
+...
+---
+name: vmop_mm_mask
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vmop_mm_mask
+ ; CHECK: %x:vmv0 = PseudoVMAND_MM_M1 $noreg, $noreg, 1, 0 /* e8 */
+ ; CHECK-NEXT: %y:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */
+ %x:vmv0 = PseudoVMAND_MM_M1 $noreg, $noreg, -1, 0
+ %y:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %x, 1, 3 /* e8 */, 0
----------------
topperc wrote:
Please test other a VADD with a different EEW and LMUL like e16 and M2. The VMAND should still be M1.
https://github.com/llvm/llvm-project/pull/112231
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