[llvm] PreISelIntrinsicLowering: Lower llvm.exp to a loop if scalable vec arg (PR #117568)

[Stephen Long via llvm-commits]

================
@@ -453,6 +454,11 @@ bool PreISelIntrinsicLowering::lowerIntrinsics(Module &M) const {
     case Intrinsic::objc_sync_exit:
       Changed |= lowerObjCCall(F, "objc_sync_exit");
       break;
+    case Intrinsic::exp:
+      Changed |= forEachCall(F, [&](CallInst *CI) {
+        return lowerUnaryMathIntrinsicWithScalableVecArgAsLoop(M, CI);
----------------
steplong wrote:

Hmm, I'm not sure I understand correctly, but `VectorLegalizer::LegalizeOp(llvm::SDValue)` on ISD::FEXP fails with a scalable vector argument for ARM64 with the following error:
```
llc reduced.ll -mtriple=aarch64 --debug-only=legalizevectorops -mattr=+v8.5a,+sve2,+sme -o -

Legalizing vector op: t3: nxv4f32 = fexp t2
Expanding
t3: nxv4f32 = fexp t2
LLVM ERROR: Invalid size request on a scalable vector.
```
```
reduced.ll

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "aarch64"

define <vscale x 4 x float> @scalable_fexp() {
  %1 = call <vscale x 4 x float> @llvm.exp.nxv4f32(<vscale x 4 x float> zeroinitializer)
  ret <vscale x 4 x float> %1
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <vscale x 4 x float> @llvm.exp.nxv4f32(<vscale x 4 x float>) #0

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```

https://github.com/llvm/llvm-project/pull/117568