[llvm] [AMDGPU] fix SIPeepholeSDWA optimization for fp16 (PR #109395)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 11 03:18:26 PST 2024


arsenm wrote:

Looks equivalent to me. The BFE is extracting 8 bits at offset 0, and sign extending it. That should be the same thing as sign extending BYTE_0. 

https://github.com/llvm/llvm-project/pull/109395


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