[lld] [lld] Add thunks for hexagon (PR #111217)

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 10 20:51:44 PST 2024


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@@ -252,6 +259,34 @@ static uint32_t findMaskR16(Ctx &ctx, uint32_t insn) {
 
 static void or32le(uint8_t *p, int32_t v) { write32le(p, read32le(p) | v); }
 
+bool Hexagon::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
+  int64_t offset = dst - src;
+  switch (type) {
+  case llvm::ELF::R_HEX_B22_PCREL:
+  case llvm::ELF::R_HEX_PLT_B22_PCREL:
+  case llvm::ELF::R_HEX_GD_PLT_B22_PCREL:
+  case llvm::ELF::R_HEX_LD_PLT_B22_PCREL:
+    return llvm::isInt<22>(offset >> 2);
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MaskRay wrote:

We need tests to test the thunk range. aarch64-thunk-pi.s ppc64-long-branch.s are examples to test the exact range.

https://github.com/llvm/llvm-project/pull/111217


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