[llvm] [RISCV][VLOPT] Add vl-opt-op-info tests for unit strided and strided stores (PR #119465)

[Craig Topper via llvm-commits]

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@@ -247,6 +247,24 @@ static OperandInfo getOperandInfo(const MachineInstr &MI,
     llvm_unreachable("Configuration setting instructions do not read or write "
                      "vector registers");
 
+  // Vector Loads and Stores
+  // Vector Unit-Stride Instructions
+  // Vector Strided Instructions
+  /// Dest EEW encoded in the instruction and EMUL=(EEW/SEW)*LMUL
+  case RISCV::VSE8_V:
+  case RISCV::VSM_V:
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topperc wrote:

VSM should use `OperandInfo(getEMULEqualsEEWDivSEWTimesLMUL(0, MI), 0)`

https://github.com/llvm/llvm-project/pull/119465