[llvm] Reapply [AMDGPU] prevent shrinking udiv/urem if either | operand exceeds signed max (PR #119325)

via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 10 10:17:04 PST 2024


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff 46bf67d8faa6a7d75561fe03b5b871ec4b4a9c1d 13655448601f15e5a7b0a7a76d3faab378e7d666 --extensions cpp -- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
index 2fca23a4d9..e84c1f2d32 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
@@ -254,9 +254,8 @@ public:
 
   bool divHasSpecialOptimization(BinaryOperator &I,
                                  Value *Num, Value *Den) const;
-  unsigned getDivNumBits(BinaryOperator &I,
-                    Value *Num, Value *Den,
-                    unsigned AtLeast, bool Signed) const;
+  unsigned getDivNumBits(BinaryOperator &I, Value *Num, Value *Den,
+                         unsigned AtLeast, bool Signed) const;
 
   /// Expands 24 bit div or rem.
   Value* expandDivRem24(IRBuilder<> &Builder, BinaryOperator &I,
@@ -1194,8 +1193,9 @@ static Value* getMulHu(IRBuilder<> &Builder, Value *LHS, Value *RHS) {
 /// ComputeNumSignBits/computeKnownBits call if we the first one is
 /// insufficient.
 unsigned AMDGPUCodeGenPrepareImpl::getDivNumBits(BinaryOperator &I, Value *Num,
-                                            Value *Den, unsigned MaxDivBits,
-                                            bool IsSigned) const {
+                                                 Value *Den,
+                                                 unsigned MaxDivBits,
+                                                 bool IsSigned) const {
   unsigned SSBits = Num->getType()->getScalarSizeInBits();
   if (IsSigned) {
     unsigned RHSSignBits = ComputeNumSignBits(Den, DL, 0, AC, &I);
@@ -1211,7 +1211,7 @@ unsigned AMDGPUCodeGenPrepareImpl::getDivNumBits(BinaryOperator &I, Value *Num,
 
     unsigned SignBits = std::min(LHSSignBits, RHSSignBits);
     DivBits = SSBits - SignBits + 1;
-    return DivBits; 
+    return DivBits;
   }
 
   // All bits are used for unsigned division for Num or Den in range

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https://github.com/llvm/llvm-project/pull/119325


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