[llvm] [RISCV][TTI] Model the cost of insert/extractelt when the vector split into multiple register group and idx exceed single group. (PR #118401)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 10 09:10:42 PST 2024


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@@ -1922,6 +1922,33 @@ InstructionCost RISCVTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
       SlideCost = 1; // With a constant index, we do not need to use addi.
   }
 
+  // When the vector needs to split into multiple register groups and the index
+  // exceeds single vector register group, we need to insert/extract the element
+  // via stack.
+  if (LT.first > 1 &&
+      ((Index == -1U) || (Index >= LT.second.getVectorMinNumElements() &&
+                          LT.second.isScalableVector()))) {
+    Type *ScalarType = Val->getScalarType();
+    Align VecAlign = DL.getPrefTypeAlign(Val);
+    Align SclAlign = DL.getPrefTypeAlign(ScalarType);
+
+    // Store all split vectors into stack and load the target element.
+    if (Opcode == Instruction::ExtractElement)
+      return LT.first * getMemoryOpCost(Instruction::Store, Val, VecAlign, 0,
+                                        CostKind) +
+             getMemoryOpCost(Instruction::Load, ScalarType, SclAlign, 0,
----------------
preames wrote:

You're missing the addressing cost in both cases here.  For the vector, that should be handled inside getMemoryOpCost, but you need to include the ADDI for the non-constant index case on the scalar load or store.

https://github.com/llvm/llvm-project/pull/118401


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