[llvm] [AArch64][SME2] Add FORM_STRIDED_TUPLE pseudo nodes (PR #116399)

[Sander de Smalen via llvm-commits]

================
@@ -8641,6 +8646,55 @@ static bool checkZExtBool(SDValue Arg, const SelectionDAG &DAG) {
   return ZExtBool;
 }
 
+bool shouldUseFormStridedPseudo(MachineInstr &MI) {
+  MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
+  bool UseFormStrided = false;
+  unsigned NumOperands =
+      MI.getOpcode() == AArch64::FORM_STRIDED_TUPLE_X2_PSEUDO ? 2 : 4;
+
+  // The FORM_STRIDED_TUPLE pseudo should only be used if the input operands
+  // are copy nodes where the source register is in a StridedOrContiguous
+  // class. For example:
+  //   %3:zpr2stridedorcontiguous = LD1B_2Z_IMM_PSEUDO ..
+  //   %4:zpr = COPY %3.zsub1:zpr2stridedorcontiguous
+  //   %5:zpr = COPY %3.zsub0:zpr2stridedorcontiguous
+  //   %6:zpr2stridedorcontiguous = LD1B_2Z_PSEUDO ..
+  //   %7:zpr = COPY %6.zsub1:zpr2stridedorcontiguous
+  //   %8:zpr = COPY %6.zsub0:zpr2stridedorcontiguous
+  //   %9:zpr2mul2 = FORM_STRIDED_TUPLE_X2_PSEUDO %5:zpr, %8:zpr
+
+  MCRegister SubReg = MCRegister::NoRegister;
+  for (unsigned I = 1; I < MI.getNumOperands(); ++I) {
+    MachineOperand &MO = MI.getOperand(I);
+    assert(MO.isReg() && "Unexpected operand to FORM_STRIDED_TUPLE");
+
+    MachineOperand *Def = MRI.getOneDef(MO.getReg());
+    if (!Def || !Def->isReg() || !Def->getParent()->isCopy()) {
+      UseFormStrided = false;
+      break;
+    }
+
+    MachineOperand CpyOp = Def->getParent()->getOperand(1);
+    MachineOperand *Ld = MRI.getOneDef(CpyOp.getReg());
+    unsigned OpSubReg = CpyOp.getSubReg();
+    if (SubReg == MCRegister::NoRegister)
+      SubReg = OpSubReg;
+    if (!Ld || !Ld->isReg() || OpSubReg != SubReg) {
+      UseFormStrided = false;
+      break;
+    }
----------------
sdesmalen-arm wrote:

this can `return false;` directly

https://github.com/llvm/llvm-project/pull/116399