[llvm] [DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x, c1)), c2) and folding (shl(sext(add x, c1)), c2) in some scenarios (PR #101294)

Yingwei Zheng via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 9 23:51:11 PST 2024


dtcxzyw wrote:

Regression:
```
; bin/llc -mtriple=riscv64 -mattr=+zba test.ll -o -
define i64 @test(i64 %x) {
entry:
  %or = or i64 %x, 1
  %mul = mul nuw nsw i64 %or, 3
  ret i64 %mul
}
```
Before: https://godbolt.org/z/6vKhhxrWr
```
test:
        ori     a0, a0, 1
        sh1add  a0, a0, a0
        ret
```
After:
```
test:
        ori     a1, a0, 1
        slli    a0, a0, 1
        ori     a0, a0, 2
        add     a0, a0, a1
        ret
```

https://github.com/llvm/llvm-project/pull/101294


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