[llvm] [AArch64] Combine and and lsl into ubfiz (PR #118974)

Cullen Rhodes via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 9 08:42:39 PST 2024


c-rhodes wrote:

> Most of these probably get canoicalized to and(shift) https://godbolt.org/z/PP6b8PY8x, which we already have lowering for https://godbolt.org/z/c5bPGE74d. It would be nice if this handled other mask sizes too.

Not sure I follow, what should handle other mask sizes? In the second link you sent inst-combine does canonicalize to the same IR: https://godbolt.org/z/qqqosjP98

but this musn't be happening in compilation pipeline? Also, your example is and/shl, whereas the original example is shl(zext). I noticed in SDAG there's no `ZERO_EXTEND_INREG` node as an AND with constant is used instead, are you using and/shl as that's the canonical form or something?

> Most of the time UBFM goes via DAG2DAG, using functions like AArch64DAGToDAGISel::tryBitfieldInsertInZeroOp.

It's not clear to me if you're suggesting to fix this in the canonicalizer or DAG2DAG, or a mix of both?


https://github.com/llvm/llvm-project/pull/118974


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